[clang] [llvm] [RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extension (PR #124706)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,117 @@
+# Xqcilia - Qualcomm uC Large Immediate Arithmetic extension
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-xqcilia < %s 2>&1 \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-PLUS,CHECK-IMM %s
+# RUN: not llvm-mc -triple riscv32 -mattr=-experimental-xqcilia < %s 2>&1 \
+# RUN:     | FileCheck -check-prefixes=CHECK,CHECK-MINUS,CHECK-EXT %s
+
+# CHECK-PLUS: :[[@LINE+2]]:12: error: register must be a GPR excluding zero (x0)
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topperc wrote:

@lenary I just noticed this error isn't worded well when the user didn't provide a register. Maybe we "operand must a GPR register excluding zero (x0)" would be better?

https://github.com/llvm/llvm-project/pull/124706