[llvm] [AMDGPU] Add support for point sample accel out of order returns (PR #127991)

[Jay Foad via llvm-commits]

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@@ -52,6 +52,7 @@ class MIMGBaseOpcode : PredicateControl {
   bit BVH = 0;
   bit A16 = 0;
   bit NoReturn = 0;
+  bit PointSampleAccel = 0; // Opcode eligable for gfx11.5 point sample acceleration
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jayfoad wrote:

```suggestion
  bit PointSampleAccel = 0; // Opcode eligible for gfx11.5 point sample acceleration
```

https://github.com/llvm/llvm-project/pull/127991