[llvm] WIP: AMDGPU: Use MFPropsModifier modifier in SIFoldOperands (PR #127752)

[Akshat Oke via llvm-commits]

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/127752

>From 9f789fb5e604536607282b3b24c3cbb939d1d132 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 19 Feb 2025 13:25:24 +0700
Subject: [PATCH 1/2] WIP: AMDGPU: Use MFPropsModifier modifier in
 SIFoldOperands

This doesn't appear to work. I do not get an error in the new PM.
---
 llvm/lib/Target/AMDGPU/SIFoldOperands.cpp         |  2 ++
 .../AMDGPU/si-fold-operands-requires-ssa.mir      | 15 +++++++++++++++
 2 files changed, 17 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir

diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index ab396929162d0..54baf90d95a12 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -2311,6 +2311,8 @@ bool SIFoldOperandsImpl::tryOptimizeAGPRPhis(MachineBasicBlock &MBB) {
 }
 
 bool SIFoldOperandsImpl::run(MachineFunction &MF) {
+  MFPropsModifier _(*this, MF);
+
   MRI = &MF.getRegInfo();
   ST = &MF.getSubtarget<GCNSubtarget>();
   TII = ST->getInstrInfo();
diff --git a/llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir b/llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
new file mode 100644
index 0000000000000..9cad4eeab76c8
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
@@ -0,0 +1,15 @@
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=si-fold-operands -filetype=null %s 2>&1 | FileCheck -check-prefix=ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -passes=si-fold-operands -filetype=null %s 2>&1 | FileCheck -check-prefix=ERR %s
+
+# ERR: MachineFunctionProperties required by SI Fold Operands pass are not met by function not_ssa.
+# ERR-NEXT: Required properties: IsSSA
+# ERR-NEXT: Current properties: NoPHIs
+---
+name:            not_ssa
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1
+    %0:vgpr_32 = COPY $vgpr0
+    %0:vgpr_32 = COPY $vgpr1
+
+...

>From 3c9e817e5561152ef42f5d876effdb9bfbca147e Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Thu, 20 Feb 2025 12:53:09 +0000
Subject: [PATCH 2/2] fix mir test

---
 llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir b/llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
index 9cad4eeab76c8..ef96c1d5f1bb6 100644
--- a/llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
+++ b/llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
@@ -1,7 +1,8 @@
-# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=si-fold-operands -filetype=null %s 2>&1 | FileCheck -check-prefix=ERR %s
-# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -passes=si-fold-operands -filetype=null %s 2>&1 | FileCheck -check-prefix=ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=si-fold-operands -filetype=null %s 2>&1 | FileCheck -check-prefixes=ERR-LEGACY,ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -passes=si-fold-operands -filetype=null %s 2>&1 | FileCheck -check-prefixes=ERR-NPM,ERR %s
 
-# ERR: MachineFunctionProperties required by SI Fold Operands pass are not met by function not_ssa.
+# ERR-LEGACY: MachineFunctionProperties required by SI Fold Operands pass are not met by function not_ssa.
+# ERR-NPM: MachineFunctionProperties required by SIFoldOperandsPass pass are not met by function not_ssa.
 # ERR-NEXT: Required properties: IsSSA
 # ERR-NEXT: Current properties: NoPHIs
 ---