[llvm] 0c809ea - [Mips] Reserve hardware register HWR2 (#127775)

[via llvm-commits]

Author: yingopq
Date: 2025-02-20T20:53:30+08:00
New Revision: 0c809ea336143f6118339521cbebe9e182e7a5e5

URL: https://github.com/llvm/llvm-project/commit/0c809ea336143f6118339521cbebe9e182e7a5e5
DIFF: https://github.com/llvm/llvm-project/commit/0c809ea336143f6118339521cbebe9e182e7a5e5.diff

LOG: [Mips] Reserve hardware register HWR2 (#127775)

Fix pr https://github.com/llvm/llvm-project/pull/127553.
x86_64 failed to run readcyclecounter.ll when enable expensive_check,
it would error "Using an undefined physical register".

Added: 
    

Modified: 
    llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    llvm/test/CodeGen/Mips/readcyclecounter.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
index 4bfc35420b402..ae4b2377ad218 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -207,6 +207,7 @@ getReservedRegs(const MachineFunction &MF) const {
 
   // Reserve hardware registers.
   Reserved.set(Mips::HWR29);
+  Reserved.set(Mips::HWR2);
 
   // Reserve DSP control register.
   Reserved.set(Mips::DSPPos);

diff  --git a/llvm/test/CodeGen/Mips/readcyclecounter.ll b/llvm/test/CodeGen/Mips/readcyclecounter.ll
index 23d3ea014f091..467dd92884b3d 100644
--- a/llvm/test/CodeGen/Mips/readcyclecounter.ll
+++ b/llvm/test/CodeGen/Mips/readcyclecounter.ll
@@ -7,8 +7,6 @@
 ;RUN: llc -mtriple=mipsel -mcpu=mips2 < %s | FileCheck %s --check-prefix=MIPSEL_NOT_SUPPORTED
 ;RUN: llc -mtriple=mips64el -mcpu=mips3 < %s | FileCheck %s --check-prefix=MIPS64EL_NOT_SUPPORTED
 
-; XFAIL: expensive_checks
-
 declare i64 @llvm.readcyclecounter() nounwind readnone
 
 define i64 @test_readcyclecounter() nounwind {