[llvm] AMDGPU: Allow only VGPR wide sources in fp6/4/8 conversions (PR #127464)

[Pravin Jagtap via llvm-commits]

================
@@ -1818,6 +1818,18 @@ class getVOP3VRegSrcForVT<ValueType VT, bit IsTrue16 = 0, bit IsFake16 = 0> {
          1                 : RegisterOperand<VGPR_32>);
 }
 
+// VGPR only VOP3 src with 9 bit encoding
+class getVOP3VSrcReg9ForVT<ValueType VT> {
----------------
pravinjagtap wrote:

> There is already getVOP3VRegSrcForVT which has 9-bit encoding.

The current `getVOP3VRegSrcForVT` calls `Decode##RegClass##RegisterClass` which expects 8-bit encoding

```
// Decoder for registers, decode directly using RegClassID. Imm(8-bit) is
// number of register. Used by VGPR only and AGPR only operands.
#define DECODE_OPERAND_REG_8(RegClass)                                         \
  static DecodeStatus Decode##RegClass##RegisterClass(                         \
      MCInst &Inst, unsigned Imm, uint64_t /*Addr*/,                           \
      const MCDisassembler *Decoder) {                                         \
    assert(Imm < (1 << 8) && "8-bit encoding");                                \
    auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder);              \
    return addOperand(                                                         \
        Inst, DAsm->createRegOperand(AMDGPU::RegClass##RegClassID, Imm));      \
  }
```

https://github.com/llvm/llvm-project/pull/127464