[lld] [llvm] [AArch64][ELF] Section alignment of 4 for AArch64 instruction (PR #114031)

[Florin Popa via llvm-commits]

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@@ -30,7 +30,7 @@ mystr:
 # CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_HI21:
 # CHECK-EMPTY:
 # CHECK-NEXT: <.R_AARCH64_ADR_PREL_PG_HI21>:
-# CHECK-NEXT:   210132:       90000001        adrp    x1, 0x210000
+# CHECK-NEXT:   210134:       90000001        adrp    x1, 0x210000
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popaflorin wrote:

Thank you! I have merged now your changes

https://github.com/llvm/llvm-project/pull/114031