[llvm] [NFC] add a pre-commit test case for patch #127121 that hoists xxsplitib out of loop (PR #127701)
zhijian lin via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 19 13:53:08 PST 2025
https://github.com/diggerlin updated https://github.com/llvm/llvm-project/pull/127701
>From 0cbedf9beba777770175df834a7220551c0757b7 Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Tue, 18 Feb 2025 22:05:45 +0000
Subject: [PATCH 1/3] add NFC test to test the xxsplti not be hoisted out the
loop
---
llvm/test/CodeGen/PowerPC/licm-xxsplti.ll | 107 ++++++++++++++++++++++
1 file changed, 107 insertions(+)
create mode 100644 llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
diff --git a/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll b/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
new file mode 100644
index 0000000000000..0628e10e84f61
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
@@ -0,0 +1,107 @@
+;; Test hoisting `xxspltib` out the loop.
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: %s -o - 2>&1 | FileCheck %s
+
+define void @_Z3fooPfS_Pi(ptr noalias nocapture noundef writeonly %_a, ptr noalias nocapture noundef readonly %In_a, ptr noalias nocapture noundef readonly %n) local_unnamed_addr #0 {
+entry:
+ %0 = load i32, ptr %n, align 4
+ %cmp9 = icmp sgt i32 %0, 0
+ br i1 %cmp9, label %for.body.preheader, label %for.cond.cleanup
+
+for.body.preheader:
+ %wide.trip.count = zext nneg i32 %0 to i64
+ %xtraiter = and i64 %wide.trip.count, 1
+ %1 = icmp eq i32 %0, 1
+ br i1 %1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new
+
+for.body.preheader.new:
+ %unroll_iter = and i64 %wide.trip.count, 2147483646
+ br label %for.body
+
+for.cond.cleanup.loopexit.unr-lcssa:
+ %indvars.iv.unr = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next.1, %for.body ]
+ %lcmp.mod.not = icmp eq i64 %xtraiter, 0
+ br i1 %lcmp.mod.not, label %for.cond.cleanup, label %for.body.epil
+
+for.body.epil:
+ %arrayidx.epil = getelementptr inbounds nuw float, ptr %In_a, i64 %indvars.iv.unr
+ %2 = load float, ptr %arrayidx.epil, align 4
+ %vecins.i.epil = insertelement <4 x float> poison, float %2, i64 0
+ %3 = bitcast <4 x float> %vecins.i.epil to <16 x i8>
+ %and1.i.epil = and <16 x i8> %3, <i8 6, i8 6, i8 6, i8 6, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>
+ %4 = bitcast <16 x i8> %and1.i.epil to <4 x float>
+ %vecext.i.epil = extractelement <4 x float> %4, i64 0
+ %arrayidx5.epil = getelementptr inbounds nuw float, ptr %_a, i64 %indvars.iv.unr
+ store float %vecext.i.epil, ptr %arrayidx5.epil, align 4
+ br label %for.cond.cleanup
+
+for.cond.cleanup:
+ ret void
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %for.body.preheader.new ], [ %indvars.iv.next.1, %for.body ]
+ %niter = phi i64 [ 0, %for.body.preheader.new ], [ %niter.next.1, %for.body ]
+ %arrayidx = getelementptr inbounds nuw float, ptr %In_a, i64 %indvars.iv
+ %5 = load float, ptr %arrayidx, align 4
+ %vecins.i = insertelement <4 x float> poison, float %5, i64 0
+ %6 = bitcast <4 x float> %vecins.i to <16 x i8>
+ %and1.i = and <16 x i8> %6, <i8 6, i8 6, i8 6, i8 6, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>
+ %7 = bitcast <16 x i8> %and1.i to <4 x float>
+ %vecext.i = extractelement <4 x float> %7, i64 0
+ %arrayidx5 = getelementptr inbounds nuw float, ptr %_a, i64 %indvars.iv
+ store float %vecext.i, ptr %arrayidx5, align 4
+ %indvars.iv.next = or disjoint i64 %indvars.iv, 1
+ %arrayidx.1 = getelementptr inbounds nuw float, ptr %In_a, i64 %indvars.iv.next
+ %8 = load float, ptr %arrayidx.1, align 4
+ %vecins.i.1 = insertelement <4 x float> poison, float %8, i64 0
+ %9 = bitcast <4 x float> %vecins.i.1 to <16 x i8>
+ %and1.i.1 = and <16 x i8> %9, <i8 6, i8 6, i8 6, i8 6, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>
+ %10 = bitcast <16 x i8> %and1.i.1 to <4 x float>
+ %vecext.i.1 = extractelement <4 x float> %10, i64 0
+ %arrayidx5.1 = getelementptr inbounds nuw float, ptr %_a, i64 %indvars.iv.next
+ store float %vecext.i.1, ptr %arrayidx5.1, align 4
+ %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
+ %niter.next.1 = add i64 %niter, 2
+ %niter.ncmp.1 = icmp eq i64 %niter.next.1, %unroll_iter
+ br i1 %niter.ncmp.1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
+}
+
+attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr10" "target-features"="+altivec,+bpermd,+crbits,+crypto,+direct-move,+extdiv,+isa-v206-instructions,+isa-v207-instructions,+isa-v30-instructions,+isa-v31-instructions,+mma,+paired-vector-memops,+pcrelative-memops,+power10-vector,+power8-vector,+power9-vector,+prefix-instrs,+quadword-atomics,+vsx,-aix-shared-lib-tls-model-opt,-aix-small-local-dynamic-tls,-aix-small-local-exec-tls,-htm,-privileged,-rop-protect,-spe" }
+
+; CHECK: ._Z3fooPfS_Pi:
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: lwz 5, 0(5)
+; CHECK-NEXT: cmpwi 5, 1
+; CHECK-NEXT: bltlr 0
+; CHECK-NEXT: # %bb.1: # %for.body.preheader
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: cmplwi 5, 1
+; CHECK-NEXT: beq 0, L..BB0_4
+; CHECK-NEXT: # %bb.2: # %for.body.preheader.new
+; CHECK-NEXT: rlwinm 6, 5, 0, 1, 30
+; CHECK-NEXT: addi 10, 4, -8
+; CHECK-NEXT: addi 7, 3, -8
+; CHECK-NEXT: li 8, 8
+; CHECK-NEXT: li 9, 12
+; CHECK-NEXT: li 11, 4
+; CHECK-NEXT: addi 6, 6, -2
+; CHECK-NEXT: rldicl 6, 6, 63, 1
+; CHECK-NEXT: addi 6, 6, 1
+; CHECK-NEXT: mtctr 6
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: .align 4
+; CHECK-NEXT: L..BB0_3: # %for.body
+; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: lxvwsx 0, 10, 8
+; CHECK-NEXT: xxspltib 1, 6
+; CHECK-NEXT: addi 6, 6, 2
+; CHECK-NEXT: xxland 0, 0, 1
+; CHECK-NEXT: xscvspdpn 0, 0
+; CHECK-NEXT: stfsu 0, 8(7)
+; CHECK-NEXT: lxvwsx 0, 10, 9
+; CHECK-NEXT: addi 10, 10, 8
+; CHECK-NEXT: xxland 0, 0, 1
+; CHECK-NEXT: xxsldwi 0, 0, 0, 3
+; CHECK-NEXT: stfiwx 0, 7, 11
+; CHECK-NEXT: bdnz L..BB0_3
>From 8713cf5996c186154ecca66c8b16723f7ca511d6 Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Wed, 19 Feb 2025 16:36:28 +0000
Subject: [PATCH 2/3] address comment
---
llvm/test/CodeGen/PowerPC/licm-xxsplti.ll | 156 ++++++++++++++++------
1 file changed, 116 insertions(+), 40 deletions(-)
diff --git a/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll b/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
index 0628e10e84f61..66c5f617b152d 100644
--- a/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
+++ b/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
@@ -1,9 +1,15 @@
;; Test hoisting `xxspltib` out the loop.
-; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
-; RUN: %s -o - 2>&1 | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff --mcpu=pwr10 \
+; RUN: %s -o - 2>&1 | FileCheck --check-prefix=AIX64 %s
-define void @_Z3fooPfS_Pi(ptr noalias nocapture noundef writeonly %_a, ptr noalias nocapture noundef readonly %In_a, ptr noalias nocapture noundef readonly %n) local_unnamed_addr #0 {
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff --mcpu=pwr10 \
+; RUN: %s -o - 2>&1 | FileCheck --check-prefix=AIX32 %s
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibn-linux --mcpu=pwr10 \
+; RUN: %s -o - 2>&1 | FileCheck --check-prefix=LINUX %s
+
+define void @_Z3fooPfS_Pi(ptr noalias nocapture noundef %_a, ptr noalias nocapture %In_a, ptr noalias nocapture %n) {
entry:
%0 = load i32, ptr %n, align 4
%cmp9 = icmp sgt i32 %0, 0
@@ -67,41 +73,111 @@ for.body:
br i1 %niter.ncmp.1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
}
-attributes #0 = { mustprogress nofree norecurse nosync nounwind memory(argmem: readwrite) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr10" "target-features"="+altivec,+bpermd,+crbits,+crypto,+direct-move,+extdiv,+isa-v206-instructions,+isa-v207-instructions,+isa-v30-instructions,+isa-v31-instructions,+mma,+paired-vector-memops,+pcrelative-memops,+power10-vector,+power8-vector,+power9-vector,+prefix-instrs,+quadword-atomics,+vsx,-aix-shared-lib-tls-model-opt,-aix-small-local-dynamic-tls,-aix-small-local-exec-tls,-htm,-privileged,-rop-protect,-spe" }
+; AIX32: ._Z3fooPfS_Pi:
+; AIX32-NEXT: # %bb.0: # %entry
+; AIX32-NEXT: lwz 5, 0(5)
+; AIX32-NEXT: cmpwi 5, 1
+; AIX32-NEXT: bltlr 0
+; AIX32-NEXT: # %bb.1: # %for.body.preheader
+; AIX32-NEXT: li 6, 0
+; AIX32-NEXT: beq 0, L..BB0_4
+; AIX32-NEXT: # %bb.2: # %for.body.preheader.new
+; AIX32-NEXT: addi 12, 4, -8
+; AIX32-NEXT: addi 9, 3, -8
+; AIX32-NEXT: rlwinm 7, 5, 0, 1, 30
+; AIX32-NEXT: li 8, 0
+; AIX32-NEXT: li 10, 8
+; AIX32-NEXT: li 11, 12
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB0_3: # %for.body
+; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
+; AIX32-NEXT: lxvwsx 0, 12, 10
+; AIX32-NEXT: xxspltib 1, 6
+; AIX32-NEXT: lxvwsx 2, 12, 11
+; AIX32-NEXT: addic 6, 6, 2
+; AIX32-NEXT: addi 12, 12, 8
+; AIX32-NEXT: addze 8, 8
+; AIX32-NEXT: xor 0, 6, 7
+; AIX32-NEXT: or. 0, 0, 8
+; AIX32-NEXT: xxland 0, 0, 1
+; AIX32-NEXT: xxland 1, 2, 1
+; AIX32-NEXT: xscvspdpn 0, 0
+; AIX32-NEXT: stfsu 0, 8(9)
+; AIX32-NEXT: xscvspdpn 0, 1
+; AIX32-NEXT: stfs 0, 4(9)
+; AIX32-NEXT: bne 0, L..BB0_3
+
+; AIX64: ._Z3fooPfS_Pi:
+; AIX64-NEXT: # %bb.0: # %entry
+; AIX64-NEXT: lwz 5, 0(5)
+; AIX64-NEXT: cmpwi 5, 1
+; AIX64-NEXT: bltlr 0
+; AIX64-NEXT: # %bb.1: # %for.body.preheader
+; AIX64-NEXT: li 6, 0
+; AIX64-NEXT: cmplwi 5, 1
+; AIX64-NEXT: beq 0, L..BB0_4
+; AIX64-NEXT: # %bb.2: # %for.body.preheader.new
+; AIX64-NEXT: rlwinm 6, 5, 0, 1, 30
+; AIX64-NEXT: addi 10, 4, -8
+; AIX64-NEXT: addi 7, 3, -8
+; AIX64-NEXT: li 8, 8
+; AIX64-NEXT: li 9, 12
+; AIX64-NEXT: li 11, 4
+; AIX64-NEXT: addi 6, 6, -2
+; AIX64-NEXT: rldicl 6, 6, 63, 1
+; AIX64-NEXT: addi 6, 6, 1
+; AIX64-NEXT: mtctr 6
+; AIX64-NEXT: li 6, 0
+; AIX64-NEXT: .align 4
+; AIX64-NEXT: L..BB0_3: # %for.body
+; AIX64-NEXT: # =>This Inner Loop Header: Depth=1
+; AIX64-NEXT: lxvwsx 0, 10, 8
+; AIX64-NEXT: xxspltib 1, 6
+; AIX64-NEXT: addi 6, 6, 2
+; AIX64-NEXT: xxland 0, 0, 1
+; AIX64-NEXT: xscvspdpn 0, 0
+; AIX64-NEXT: stfsu 0, 8(7)
+; AIX64-NEXT: lxvwsx 0, 10, 9
+; AIX64-NEXT: addi 10, 10, 8
+; AIX64-NEXT: xxland 0, 0, 1
+; AIX64-NEXT: xxsldwi 0, 0, 0, 3
+; AIX64-NEXT: stfiwx 0, 7, 11
+; AIX64-NEXT: bdnz L..BB0_3
+
+; LINUX: _Z3fooPfS_Pi: # @_Z3fooPfS_Pi
+; LINUX-NEXT: .Lfunc_begin0:
+; LINUX-NEXT: .cfi_startproc
+; LINUX-NEXT: # %bb.0: # %entry
+; LINUX-NEXT: lwz 5, 0(5)
+; LINUX-NEXT: cmpwi 5, 1
+; LINUX-NEXT: bltlr 0
+; LINUX-NEXT: # %bb.1: # %for.body.preheader
+; LINUX-NEXT: li 6, 0
+; LINUX-NEXT: beq 0, .LBB0_4
+; LINUX-NEXT: # %bb.2: # %for.body.preheader.new
+; LINUX-NEXT: addi 12, 4, -8
+; LINUX-NEXT: addi 9, 3, -8
+; LINUX-NEXT: rlwinm 7, 5, 0, 1, 30
+; LINUX-NEXT: li 8, 0
+; LINUX-NEXT: li 10, 8
+; LINUX-NEXT: li 11, 12
+; LINUX-NEXT: .p2align 4
+; LINUX-NEXT: .LBB0_3: # %for.body
+; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
+; LINUX-NEXT: lxvwsx 0, 12, 10
+; LINUX-NEXT: xxspltib 1, 6
+; LINUX-NEXT: lxvwsx 2, 12, 11
+; LINUX-NEXT: addic 6, 6, 2
+; LINUX-NEXT: addi 12, 12, 8
+; LINUX-NEXT: addze 8, 8
+; LINUX-NEXT: xor 0, 6, 7
+; LINUX-NEXT: or. 0, 0, 8
+; LINUX-NEXT: xxland 0, 0, 1
+; LINUX-NEXT: xxland 1, 2, 1
+; LINUX-NEXT: xscvspdpn 0, 0
+; LINUX-NEXT: stfsu 0, 8(9)
+; LINUX-NEXT: xscvspdpn 0, 1
+; LINUX-NEXT: stfs 0, 4(9)
+; LINUX-NEXT: bne 0, .LBB0_3
+
-; CHECK: ._Z3fooPfS_Pi:
-; CHECK-NEXT: # %bb.0: # %entry
-; CHECK-NEXT: lwz 5, 0(5)
-; CHECK-NEXT: cmpwi 5, 1
-; CHECK-NEXT: bltlr 0
-; CHECK-NEXT: # %bb.1: # %for.body.preheader
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: cmplwi 5, 1
-; CHECK-NEXT: beq 0, L..BB0_4
-; CHECK-NEXT: # %bb.2: # %for.body.preheader.new
-; CHECK-NEXT: rlwinm 6, 5, 0, 1, 30
-; CHECK-NEXT: addi 10, 4, -8
-; CHECK-NEXT: addi 7, 3, -8
-; CHECK-NEXT: li 8, 8
-; CHECK-NEXT: li 9, 12
-; CHECK-NEXT: li 11, 4
-; CHECK-NEXT: addi 6, 6, -2
-; CHECK-NEXT: rldicl 6, 6, 63, 1
-; CHECK-NEXT: addi 6, 6, 1
-; CHECK-NEXT: mtctr 6
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: .align 4
-; CHECK-NEXT: L..BB0_3: # %for.body
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: lxvwsx 0, 10, 8
-; CHECK-NEXT: xxspltib 1, 6
-; CHECK-NEXT: addi 6, 6, 2
-; CHECK-NEXT: xxland 0, 0, 1
-; CHECK-NEXT: xscvspdpn 0, 0
-; CHECK-NEXT: stfsu 0, 8(7)
-; CHECK-NEXT: lxvwsx 0, 10, 9
-; CHECK-NEXT: addi 10, 10, 8
-; CHECK-NEXT: xxland 0, 0, 1
-; CHECK-NEXT: xxsldwi 0, 0, 0, 3
-; CHECK-NEXT: stfiwx 0, 7, 11
-; CHECK-NEXT: bdnz L..BB0_3
>From 0367faabd4fa9d231994c2a46903f629057e1721 Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Wed, 19 Feb 2025 22:09:47 +0000
Subject: [PATCH 3/3] address comment
---
llvm/test/CodeGen/PowerPC/licm-xxsplti.ll | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll b/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
index 66c5f617b152d..1b171d1d43f65 100644
--- a/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
+++ b/llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
@@ -1,4 +1,4 @@
-;; Test hoisting `xxspltib` out the loop.
+;; Test hoisting `xxspltib` out of the loop.
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff --mcpu=pwr10 \
; RUN: %s -o - 2>&1 | FileCheck --check-prefix=AIX64 %s
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