[llvm] [RISCV] Add DAG combine to convert (iN reduce.add (zext (vXi1 A to vXiN)) into vcpop.m (PR #127497)

[Philip Reames via llvm-commits]

================
@@ -18128,11 +18141,24 @@ static SDValue combineScalarCTPOPToVCPOP(SDNode *N, SelectionDAG &DAG,
   if (!SrcMVT.isVector() || SrcMVT.getVectorElementType() != MVT::i1)
     return SDValue();
 
-  if (!useRVVForFixedLengthVectorVT(SrcMVT, Subtarget))
-    return SDValue();
+  // Check that destination type is large enough to hold result without
+  // overflow.
+  if (Opc == ISD::VECREDUCE_ADD) {
+    unsigned MaxNumElts = SrcMVT.getVectorMinNumElements();
----------------
preames wrote:

Can use the computeVLMAX idiom for the scalable case please?
```

  unsigned EltSize = SrcMVT.getScalarSizeInBits();
  unsigned MinSize = SrcMVT.getSizeInBits().getKnownMinValue();
  unsigned VectorBitsMax = Subtarget.getRealMaxVLen();
  unsigned MaxVLMAX =
      RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize);
```

https://github.com/llvm/llvm-project/pull/127497