[llvm] [Asan] Provide TTI hook to provide memory reference infromation of ta… (PR #127753)

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git-clang-format --diff 8b284dc31070b9d1d99c593146da6248a5ca545d a756939ffc44282ab695af45e652dcd79b2047cc --extensions h,cpp -- llvm/include/llvm/Analysis/MemoryRefInfo.h llvm/include/llvm/Analysis/TargetTransformInfo.h llvm/include/llvm/Analysis/TargetTransformInfoImpl.h llvm/include/llvm/Transforms/Instrumentation/AddressSanitizerCommon.h llvm/lib/Analysis/TargetTransformInfo.cpp llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.h llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
index 5e69c64b89..37746a14e3 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
@@ -217,9 +217,8 @@ void instrumentAddress(Module &M, IRBuilder<> &IRB, Instruction *OrigIns,
                         SizeArgument, UseCalls, Recover, AsanScale, AsanOffset);
 }
 
-void getInterestingMemoryOperands(
-    Module &M, Instruction *I,
-    SmallVectorImpl<MemoryRefInfo> &Interesting) {
+void getInterestingMemoryOperands(Module &M, Instruction *I,
+                                  SmallVectorImpl<MemoryRefInfo> &Interesting) {
   const DataLayout &DL = M.getDataLayout();
   if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
     Interesting.emplace_back(I, LI->getPointerOperandIndex(), false,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.h b/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.h
index b51500c5ac..13f174ad54 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.h
@@ -50,9 +50,8 @@ void instrumentAddress(Module &M, IRBuilder<> &IRB, Instruction *OrigIns,
 
 /// Get all the memory operands from the instruction
 /// that needs to be instrumented
-void getInterestingMemoryOperands(
-    Module &M, Instruction *I,
-    SmallVectorImpl<MemoryRefInfo> &Interesting);
+void getInterestingMemoryOperands(Module &M, Instruction *I,
+                                  SmallVectorImpl<MemoryRefInfo> &Interesting);
 } // end namespace AMDGPU
 } // end namespace llvm
 
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 44e2165830..e7d8ab4385 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -2888,4 +2888,3 @@ bool RISCVTTIImpl::areInlineCompatible(const Function *Caller,
   // target-features.
   return (CallerBits & CalleeBits) == CalleeBits;
 }
-
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 66cd29a874..258062b073 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -70,7 +70,7 @@ public:
 
   bool getMemoryRefInfo(SmallVectorImpl<MemoryRefInfo> &Interesting,
                         IntrinsicInst *II) const;
-  //This might be the problem
+  // This might be the problem
   bool areInlineCompatible(const Function *Caller,
                            const Function *Callee) const;
 
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index ac639c16ea..e56826259e 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -350,9 +350,10 @@ private:
                                  LoopInfo *LI);
   bool ignoreMemIntrinsic(OptimizationRemarkEmitter &ORE, MemIntrinsic *MI);
   void instrumentMemIntrinsic(MemIntrinsic *MI);
-//  bool instrumentMemAccess(InterestingMemoryOperand &O, DomTreeUpdater &DTU,
-//                           LoopInfo *LI, const DataLayout &DL);
-  bool instrumentMemAccess(MemoryRefInfo &O, DomTreeUpdater &DTU, LoopInfo *LI, const DataLayout &DL);
+  //  bool instrumentMemAccess(InterestingMemoryOperand &O, DomTreeUpdater &DTU,
+  //                           LoopInfo *LI, const DataLayout &DL);
+  bool instrumentMemAccess(MemoryRefInfo &O, DomTreeUpdater &DTU, LoopInfo *LI,
+                           const DataLayout &DL);
   bool ignoreAccessWithoutRemark(Instruction *Inst, Value *Ptr);
   bool ignoreAccess(OptimizationRemarkEmitter &ORE, Instruction *Inst,
                     Value *Ptr);
@@ -1164,14 +1165,13 @@ void HWAddressSanitizer::instrumentMemIntrinsic(MemIntrinsic *MI) {
   MI->eraseFromParent();
 }
 
-
-//bool HWAddressSanitizer::instrumentMemAccess(InterestingMemoryOperand &O,
-//                                             DomTreeUpdater &DTU, LoopInfo *LI,
-//                                             const DataLayout &DL) {
+// bool HWAddressSanitizer::instrumentMemAccess(InterestingMemoryOperand &O,
+//                                              DomTreeUpdater &DTU, LoopInfo
+//                                              *LI, const DataLayout &DL) {
 
 bool HWAddressSanitizer::instrumentMemAccess(MemoryRefInfo &O,
-                                             DomTreeUpdater &DTU,
-                                             LoopInfo *LI, const DataLayout &DL) {
+                                             DomTreeUpdater &DTU, LoopInfo *LI,
+                                             const DataLayout &DL) {
   Value *Addr = O.getPtr();
 
   LLVM_DEBUG(dbgs() << "Instrumenting: " << O.getInsn() << "\n");

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https://github.com/llvm/llvm-project/pull/127753