[clang] [llvm] [RISCV] Assembler support for XRivosVizip (PR #127694)
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 18 14:48:17 PST 2025
================
@@ -202,6 +202,7 @@
// CHECK-NEXT: xqcilo 0.2 'Xqcilo' (Qualcomm uC Large Offset Load Store Extension)
// CHECK-NEXT: xqcilsm 0.2 'Xqcilsm' (Qualcomm uC Load Store Multiple Extension)
// CHECK-NEXT: xqcisls 0.2 'Xqcisls' (Qualcomm uC Scaled Load Store Extension)
+// CHECK-NEXT: xrivosvizip 0.1 'XRivosVizip' (Rivos Vector Register Zips)
----------------
preames wrote:
As noted in my original comment, there is no existing consistency. Ventana and THead both use vendor name in the extension name, not the instruction mnemonic prefix. Examples:
```
$ fgrep ventana test/Driver/print-supported-extensions-riscv.c
// CHECK-NEXT: xventanacondops 1.0 'XVentanaCondOps' (Ventana Conditional Ops)
$ fgrep thead /test/Driver/print-supported-extensions-riscv.c
// CHECK-NEXT: xtheadba 1.0 'XTHeadBa' (T-Head address calculation instructions)
// CHECK-NEXT: xtheadbb 1.0 'XTHeadBb' (T-Head basic bit-manipulation instructions)
// CHECK-NEXT: xtheadbs 1.0 'XTHeadBs' (T-Head single-bit instructions)
// CHECK-NEXT: xtheadcmo 1.0 'XTHeadCmo' (T-Head cache management instructions)
// CHECK-NEXT: xtheadcondmov 1.0 'XTHeadCondMov' (T-Head conditional move instructions)
// CHECK-NEXT: xtheadfmemidx 1.0 'XTHeadFMemIdx' (T-Head FP Indexed Memory Operations)
// CHECK-NEXT: xtheadmac 1.0 'XTHeadMac' (T-Head Multiply-Accumulate Instructions)
// CHECK-NEXT: xtheadmemidx 1.0 'XTHeadMemIdx' (T-Head Indexed Memory Operations)
// CHECK-NEXT: xtheadmempair 1.0 'XTHeadMemPair' (T-Head two-GPR Memory Operations)
// CHECK-NEXT: xtheadsync 1.0 'XTHeadSync' (T-Head multicore synchronization instructions)
// CHECK-NEXT: xtheadvdot 1.0 'XTHeadVdot' (T-Head Vector Extensions for Dot)
```
https://github.com/llvm/llvm-project/pull/127694
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