[llvm] 74cb1f9 - [PowerPC] Use MCRegister. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 18 09:05:47 PST 2025
Author: Craig Topper
Date: 2025-02-18T09:05:25-08:00
New Revision: 74cb1f9f51e5dcc6d0689994b6e0fa9c19d687c9
URL: https://github.com/llvm/llvm-project/commit/74cb1f9f51e5dcc6d0689994b6e0fa9c19d687c9
DIFF: https://github.com/llvm/llvm-project/commit/74cb1f9f51e5dcc6d0689994b6e0fa9c19d687c9.diff
LOG: [PowerPC] Use MCRegister. NFC
Added:
Modified:
llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
index 7511e24f705c1..74404822757ed 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
@@ -492,9 +492,9 @@ void PPCInstPrinter::printAbsBranchOperand(const MCInst *MI, unsigned OpNo,
void PPCInstPrinter::printcrbitm(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O) {
- unsigned CCReg = MI->getOperand(OpNo).getReg();
+ MCRegister CCReg = MI->getOperand(OpNo).getReg();
unsigned RegNo;
- switch (CCReg) {
+ switch (CCReg.id()) {
default: llvm_unreachable("Unknown CR register");
case PPC::CR0: RegNo = 0; break;
case PPC::CR1: RegNo = 1; break;
@@ -648,7 +648,7 @@ void PPCInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
- unsigned Reg = Op.getReg();
+ MCRegister Reg = Op.getReg();
if (!ShowVSRNumsAsVR)
Reg = PPC::getRegNumForOperand(MII.get(MI->getOpcode()), Reg, OpNo);
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
index cef3b7c851c79..2539c6e49686a 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
@@ -488,7 +488,7 @@ getMachineOpValue(const MCInst &MI, const MCOperand &MO,
MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) ||
MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
unsigned OpNo = getOpIdxForMO(MI, MO);
- unsigned Reg =
+ MCRegister Reg =
PPC::getRegNumForOperand(MCII.get(MI.getOpcode()), MO.getReg(), OpNo);
return CTX.getRegisterInfo()->getEncodingValue(Reg);
}
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index 61be6abaacd2f..0a0facb10e48a 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -117,8 +117,8 @@ const char *PPC::stripRegisterPrefix(const char *RegName) {
/// The operand number argument will be useful when we need to extend this
/// to instructions that use both Altivec and VSX numbering (for
diff erent
/// operands).
-unsigned PPC::getRegNumForOperand(const MCInstrDesc &Desc, unsigned Reg,
- unsigned OpNo) {
+MCRegister PPC::getRegNumForOperand(const MCInstrDesc &Desc, MCRegister Reg,
+ unsigned OpNo) {
int16_t regClass = Desc.operands()[OpNo].RegClass;
switch (regClass) {
// We store F0-F31, VF0-VF31 in MCOperand and it should be F0-F31,
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
index 579ee5e8facb6..d6744014949ce 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
@@ -47,8 +47,8 @@ const char *stripRegisterPrefix(const char *RegName);
/// The operand number argument will be useful when we need to extend this
/// to instructions that use both Altivec and VSX numbering (for
diff erent
/// operands).
-unsigned getRegNumForOperand(const MCInstrDesc &Desc, unsigned Reg,
- unsigned OpNo);
+MCRegister getRegNumForOperand(const MCInstrDesc &Desc, MCRegister Reg,
+ unsigned OpNo);
} // namespace PPC
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 5784fe43879fe..ae42da6ea6e42 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -984,7 +984,7 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
// Get the offset from the GOT Base Register to the GOT
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
- unsigned PICR = TmpInst.getOperand(0).getReg();
+ MCRegister PICR = TmpInst.getOperand(0).getReg();
MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(
M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_"
: ".LTOC");
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index ba775c4a679d0..bec97c986ff66 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -267,7 +267,7 @@ static bool hasNonRISpills(const MachineFunction &MF) {
/// MustSaveLR - Return true if this function requires that we save the LR
/// register onto the stack in the prolog and restore it in the epilog of the
/// function.
-static bool MustSaveLR(const MachineFunction &MF, unsigned LR) {
+static bool MustSaveLR(const MachineFunction &MF, MCRegister LR) {
const PPCFunctionInfo *MFI = MF.getInfo<PPCFunctionInfo>();
// We need a save/restore of LR if there is any def of LR (which is
@@ -311,7 +311,7 @@ PPCFrameLowering::determineFrameLayout(const MachineFunction &MF,
const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
- unsigned LR = RegInfo->getRARegister();
+ MCRegister LR = RegInfo->getRARegister();
bool DisableRedZone = MF.getFunction().hasFnAttribute(Attribute::NoRedZone);
bool CanUseRedZone = !MFI.hasVarSizedObjects() && // No dynamic alloca.
!MFI.adjustsStack() && // No calls.
@@ -1987,7 +1987,7 @@ void PPCFrameLowering::determineCalleeSaves(MachineFunction &MF,
// Save and clear the LR state.
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
- unsigned LR = RegInfo->getRARegister();
+ MCRegister LR = RegInfo->getRARegister();
FI->setMustSaveLR(MustSaveLR(MF, LR));
SavedRegs.reset(LR);
@@ -2344,8 +2344,8 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots(
for (auto &CalleeSaveReg : CSI) {
MCPhysReg Reg = CalleeSaveReg.getReg();
- MCPhysReg Lower = RegInfo->getSubReg(Reg, 1);
- MCPhysReg Higher = RegInfo->getSubReg(Reg, 2);
+ MCRegister Lower = RegInfo->getSubReg(Reg, 1);
+ MCRegister Higher = RegInfo->getSubReg(Reg, 2);
if ( // Check only for SuperRegs.
Lower &&
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