[llvm] AMDGPU: Allow only VGPR wide sources in fp6/4/8 conversions (PR #127464)

[Sirish Pande via llvm-commits]

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@@ -1818,6 +1818,18 @@ class getVOP3VRegSrcForVT<ValueType VT, bit IsTrue16 = 0, bit IsFake16 = 0> {
          1                 : RegisterOperand<VGPR_32>);
 }
 
+// VGPR only VOP3 src with 9 bit encoding
+class getVOP3VSrcReg9ForVT<ValueType VT> {
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srpande wrote:

Where is it inheriting from SrcReg9?

I see this class. 
// Returns the vreg register class to use for source operand given VT
class getVregSrcForVT<ValueType VT, bit IsTrue16 = 0, bit IsFake16 = 1> {
  RegisterOperand ret =
  !cond(!eq(VT.Size, 512) : RegisterOperand<VReg_512>,
        !eq(VT.Size, 192) : RegisterOperand<VReg_192>,
        !eq(VT.Size, 128) : RegisterOperand<VReg_128>,
        !eq(VT.Size, 96)  : RegisterOperand<VReg_96>,
        !eq(VT.Size, 64)  : RegisterOperand<VReg_64>,
        !eq(VT.Size, 48)  : RegisterOperand<VReg_64>,
        !eq(VT.Size, 16)  : !if(IsTrue16,
                                !if(IsFake16, VGPRSrc_32_Lo128, VGPRSrc_16_Lo128),
                                RegisterOperand<VGPR_32>),
        1                 : RegisterOperand<VGPR_32>);
}


https://github.com/llvm/llvm-project/pull/127464