[llvm] [RISCV] Implement isHighLatencyDef() (PR #127476)

[Luke Lau via llvm-commits]

================
@@ -3679,6 +3679,52 @@ MachineInstr *RISCVInstrInfo::commuteInstructionImpl(MachineInstr &MI,
   return TargetInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2);
 }
 
+bool RISCVInstrInfo::isHighLatencyDef(int Opc) const {
+  switch (Opc) {
+  default:
+    return false;
+    // Integer div/rem.
----------------
lukel97 wrote:

```suggestion
  // Integer div/rem.
```

https://github.com/llvm/llvm-project/pull/127476