[llvm] [RISCV] Avoid VMNOT by swapping VMERGE operands (PR #126751)

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git-clang-format --diff 837b89fc0fc6d0ae7f68e835789ee62580314dcc ca3ba6f4cd1934eadd060f5187f95a39010ee6f5 --extensions cpp -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 11f532c25d..b27b7d75bb 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -8967,7 +8967,8 @@ SDValue RISCVTargetLowering::lowerVectorMaskExt(SDValue Op, SelectionDAG &DAG,
     SDValue SplatTrueVal = DAG.getSignedConstant(ExtTrueVal, DL, VecVT);
     if (Src.getOpcode() == ISD::XOR &&
         ISD::isConstantSplatVectorAllOnes(Src.getOperand(1).getNode(), false))
-      return DAG.getNode(ISD::VSELECT, DL, VecVT, Src.getOperand(0), SplatZero, SplatTrueVal);
+      return DAG.getNode(ISD::VSELECT, DL, VecVT, Src.getOperand(0), SplatZero,
+                         SplatTrueVal);
     return DAG.getNode(ISD::VSELECT, DL, VecVT, Src, SplatTrueVal, SplatZero);
   }
 

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https://github.com/llvm/llvm-project/pull/126751