[llvm] [WebAssembly] Enable interleaved memory accesses (PR #125696)

[Sam Parker via llvm-commits]

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+; RUN: opt -mattr=+simd128 -passes=loop-vectorize %s | llc -mtriple=wasm32 -mattr=+simd128 -verify-machineinstrs -o - | FileCheck %s
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sparker-arm wrote:

> just changing TTI?

When the change means the vectorizer acts in a completely different way, I think it's best that we have a test to monitor how the vectorizer continues to treat this input. It could change, but that is the point.

https://github.com/llvm/llvm-project/pull/125696