[llvm] de06978 - [AMDGPU] Avoid repeated hash lookups (NFC) (#127445)
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Sun Feb 16 23:24:19 PST 2025
Author: Kazu Hirata
Date: 2025-02-16T23:24:15-08:00
New Revision: de06978ebcff5f75913067b019d2d522d0be0872
URL: https://github.com/llvm/llvm-project/commit/de06978ebcff5f75913067b019d2d522d0be0872
DIFF: https://github.com/llvm/llvm-project/commit/de06978ebcff5f75913067b019d2d522d0be0872.diff
LOG: [AMDGPU] Avoid repeated hash lookups (NFC) (#127445)
Added:
Modified:
llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
index ac11526da0919..17f724c3173d9 100644
--- a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
+++ b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
@@ -270,9 +270,10 @@ bool R600VectorRegMerger::tryMergeUsingCommonSlot(RegSeqInfo &RSI,
MOE = RSI.Instr->operands_end(); MOp != MOE; ++MOp) {
if (!MOp->isReg())
continue;
- if (PreviousRegSeqByReg[MOp->getReg()].empty())
+ auto &Insts = PreviousRegSeqByReg[MOp->getReg()];
+ if (Insts.empty())
continue;
- for (MachineInstr *MI : PreviousRegSeqByReg[MOp->getReg()]) {
+ for (MachineInstr *MI : Insts) {
CompatibleRSI = PreviousRegSeq[MI];
if (RSI == CompatibleRSI)
continue;
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