[llvm] [llvm][ARM] Add a cortex-m4f alignment hazard recognizer (PR #126991)

[Jon Roelofs via llvm-commits]

jroelofs wrote:

> Hi - High level comment, on the assumption that a nop costs 1 cycle and takes 2 bytes, does this mean that:
> 
> * 1 T2 instruction ends up at -1 cycle, 2 extra bytes.
> * 2 T2 instructions is the same, -1 cycle, 2 extra bytes.
> * 3 T3 instructions is now 0 cycles, 2bytes.
> * 4 and 5 are the same as 3.
> * 6 is 1 cycle better, 2 bytes spent. Better improvement for longer chains.
> 
> If so does this have a fairly high chance of increasing runtime?

In the worst case, I suppose yes. But that said the chance of it being net-negative depends on the relative frequencies of 16 and 32 bit encodings in the basic block, since inserting a single 2 byte nop flips the alignment polarity of every 32 bit instruction following it.

> Would it be better to look across the inner loop BB and check if adding a nop will save more than it helps? Or does it not work like that? Thanks.

Sounds like we probably should have some lookahead to avoid that worst-case behavior.

https://github.com/llvm/llvm-project/pull/126991