[llvm] [PowerPC] Use getSignedTargetConstant in SelectOptimalAddrMode. (PR #127305)

[Craig Topper via llvm-commits]

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/127305

>From 847b5e2820b481ac96d77c2e855a5fe4fd6f760a Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 14 Feb 2025 23:42:13 -0800
Subject: [PATCH 1/2] [PowerPC] Use getSignedTargetConstant in
 SelectOptimalAddrMode.

Fixes #127298.
---
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 ++--
 llvm/test/CodeGen/PowerPC/pr127298.ll       | 7 +++++++
 2 files changed, 9 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/CodeGen/PowerPC/pr127298.ll

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index f1195feea80e8..767d1ded8de3a 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -19110,8 +19110,8 @@ PPC::AddrMode PPCTargetLowering::SelectOptimalAddrMode(const SDNode *Parent,
         int32_t Addr = (int32_t)CNImm;
         // Otherwise, break this down into LIS + Disp.
         Disp = DAG.getSignedTargetConstant((int16_t)Addr, DL, MVT::i32);
-        Base =
-            DAG.getTargetConstant((Addr - (int16_t)Addr) >> 16, DL, MVT::i32);
+        Base = DAG.getSignedTargetConstant((Addr - (int16_t)Addr) >> 16, DL,
+                                           MVT::i32);
         uint32_t LIS = CNType == MVT::i32 ? PPC::LIS : PPC::LIS8;
         Base = SDValue(DAG.getMachineNode(LIS, DL, CNType, Base), 0);
         break;
diff --git a/llvm/test/CodeGen/PowerPC/pr127298.ll b/llvm/test/CodeGen/PowerPC/pr127298.ll
new file mode 100644
index 0000000000000..327b7c21d698c
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/pr127298.ll
@@ -0,0 +1,7 @@
+; RUN: llc < %s -mtriple=powerpc | FileCheck %s
+
+define void @foo() {
+Entry:
+  %0 = load volatile i8, ptr inttoptr (i32 -559038737 to ptr), align 1
+  ret void
+}

>From 6b6bb9fa92c2699912473dfd754b6a995472a470 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Sat, 15 Feb 2025 12:15:20 -0800
Subject: [PATCH 2/2] fixup! add check-lines

---
 llvm/test/CodeGen/PowerPC/pr127298.ll | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/llvm/test/CodeGen/PowerPC/pr127298.ll b/llvm/test/CodeGen/PowerPC/pr127298.ll
index 327b7c21d698c..f7560216ef7d8 100644
--- a/llvm/test/CodeGen/PowerPC/pr127298.ll
+++ b/llvm/test/CodeGen/PowerPC/pr127298.ll
@@ -1,6 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc < %s -mtriple=powerpc | FileCheck %s
 
 define void @foo() {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0: # %Entry
+; CHECK-NEXT:    lis 3, -8530
+; CHECK-NEXT:    lbz 3, -16657(3)
+; CHECK-NEXT:    blr
 Entry:
   %0 = load volatile i8, ptr inttoptr (i32 -559038737 to ptr), align 1
   ret void