[llvm] [PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (PR #116984)

Nathan Chancellor via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 15 10:54:16 PST 2025


nathanchance wrote:

This causes a crash while building the Linux kernel for 32-bit powerpc. For example:

```
$ make -skj"$(nproc)" ARCH=powerpc CROSS_COMPILE=powerpc-linux-gnu- LLVM=1 LLVM_IAS=0 mrproper pmac32_defconfig drivers/md/md.o
...
*** Bad machine code: Using an undefined physical register ***
- function:    md_seq_show
- basic block: %bb.101 land.lhs.true111.i (0x561040cce110)
- instruction: dead %438:gprc = ADDZE_rec %431:gprc, implicit-def dead $carry, implicit $carry, implicit-def $cr0
- operand 3:   implicit $carry
fatal error: error in backend: Found 1 machine code errors.
clang: error: clang frontend command failed with exit code 70 (use -v to see invocation)
...
```

`cvise` spits out:

```c
struct {
  long long recovery_offset;
} *status_resync_rdev;
_Bool md_seq_show___trans_tmp_57;
int md_seq_show___trans_tmp_13;
int status_resync() {
  for (;;)
    if (status_resync_rdev->recovery_offset != ~00 &&
        status_resync_rdev->recovery_offset)
      return 1;
}
int md_seq_show() {
  status_resync();
  md_seq_show___trans_tmp_57 = md_seq_show___trans_tmp_13;
  return 0;
}
```

and from that, `llvm-reduce` spits outs:

```llvm
target datalayout = "E-m:e-p:32:32-Fn32-i64:64-n32"
target triple = "powerpc-unknown-linux-gnu"

@md_seq_show___trans_tmp_57 = external global i8

define i32 @md_seq_show(i64 %0, i32 %1) #0 {
entry:
  switch i64 %0, label %status_resync.exit [
    i64 -1, label %for.cond.i.preheader
    i64 0, label %for.cond.i.preheader
  ]

for.cond.i.preheader:                             ; preds = %entry, %entry
  ret i32 0

status_resync.exit:                               ; preds = %entry
  %tobool = icmp ne i32 %1, 0
  %storedv = zext i1 %tobool to i8
  store i8 %storedv, ptr @md_seq_show___trans_tmp_57, align 1
  ret i32 0
}

attributes #0 = { "target-features"="-aix-shared-lib-tls-model-opt,-aix-small-local-dynamic-tls,-aix-small-local-exec-tls,-altivec,-bpermd,-crbits,-crypto,-direct-move,-extdiv,-htm,-isa-v206-instructions,-isa-v207-instructions,-isa-v30-instructions,-power8-vector,-power9-vector,-privileged,-quadword-atomics,-rop-protect,-spe,-vsx" }
```

```
$ llc -o /dev/null reduced.ll

# Machine code for function md_seq_show: NoPHIs, TracksLiveness, TiedOpsRewritten
Function Live Ins: $r3 in %0, $r4 in %1, $r5 in %2

bb.0.entry:
  successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
  liveins: $r3, $r4, $r5
  %2:gprc = COPY $r5
  %1:gprc = COPY $r4
  %0:gprc = COPY $r3
  %5:gprc = ADDIC %1:gprc, 1, implicit-def dead $carry
  %6:crrc = CMPLWI %5:gprc, 1
  %22:gprc_and_gprc_nor0 = LI 1
  BCC 44, %6:crrc, %bb.2

bb.1.entry:
; predecessors: %bb.0
  successors: %bb.2(0x80000000); %bb.2(100.00%)

  %22:gprc_and_gprc_nor0 = LI 0

bb.2.entry:
; predecessors: %bb.0, %bb.1
  successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(50.00%), %bb.4(50.00%)

  %10:gprc = ADDZE_rec %0:gprc, implicit-def dead $carry, implicit $carry, implicit-def $cr0
  %13:crrc = COPY killed $cr0
  %11:gprc = ADDIC %10:gprc, -1, implicit-def $carry
  %12:gprc_and_gprc_nor0 = SUBFE %11:gprc, %10:gprc, implicit-def dead $carry, implicit killed $carry
  BCC 76, %13:crrc, %bb.4

bb.3.entry:
; predecessors: %bb.2
  successors: %bb.4(0x80000000); %bb.4(100.00%)

  %22:gprc_and_gprc_nor0 = COPY %12:gprc_and_gprc_nor0

bb.4.entry:
; predecessors: %bb.2, %bb.3
  successors: %bb.5(0x55555556), %bb.6(0x2aaaaaaa); %bb.5(66.67%), %bb.6(33.33%)

  %15:crrc = CMPLWI %22:gprc_and_gprc_nor0, 0
  BCC 68, %15:crrc, %bb.6
  B %bb.5

bb.5.for.cond.i.preheader:
; predecessors: %bb.4

  $r3 = LI 0
  BLR implicit $lr, implicit $rm, implicit $r3

bb.6.status_resync.exit:
; predecessors: %bb.4

  %17:gprc = ADDIC %2:gprc, -1, implicit-def $carry
  %19:gprc_and_gprc_nor0 = LIS target-flags(ppc-ha) @md_seq_show___trans_tmp_57
  %18:gprc = SUBFE %17:gprc, %2:gprc, implicit-def dead $carry, implicit killed $carry
  $r3 = LI 0
  STB %18:gprc, target-flags(ppc-lo) @md_seq_show___trans_tmp_57, %19:gprc_and_gprc_nor0 :: (store (s8) into @md_seq_show___trans_tmp_57)
  BLR implicit $lr, implicit $rm, implicit $r3

# End machine code for function md_seq_show.

*** Bad machine code: Using an undefined physical register ***
- function:    md_seq_show
- basic block: %bb.2 entry (0x55d10cfa37f0)
- instruction: %10:gprc = ADDZE_rec %0:gprc, implicit-def dead $carry, implicit $carry, implicit-def $cr0
- operand 3:   implicit $carry
LLVM ERROR: Found 1 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: llc -o /dev/null reduced.ll
1.	Running pass 'Function Pass Manager' on module 'reduced.ll'.
2.	Running pass 'Machine Instruction Scheduler' on function '@md_seq_show'
 #0 0x000055d10ab77c76 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x5930c76)
 #1 0x000055d10ab7558e llvm::sys::RunSignalHandlers() (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x592e58e)
 #2 0x000055d10ab78354 SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0
 #3 0x00007f146a44bcd0 (/usr/lib/libc.so.6+0x3dcd0)
 #4 0x00007f146a4a5624 (/usr/lib/libc.so.6+0x97624)
 #5 0x00007f146a44bba0 raise (/usr/lib/libc.so.6+0x3dba0)
 #6 0x00007f146a433582 abort (/usr/lib/libc.so.6+0x25582)
 #7 0x000055d10aadc5d4 llvm::report_fatal_error(llvm::Twine const&, bool) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x58955d4)
 #8 0x000055d109c6149c (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x4a1a49c)
 #9 0x000055d109c61bed llvm::MachineFunction::verify(llvm::Pass*, char const*, llvm::raw_ostream*, bool) const (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x4a1abed)
#10 0x000055d109a71974 llvm::LiveRangeCalc::findReachingDefs(llvm::LiveRange&, llvm::MachineBasicBlock&, llvm::SlotIndex, unsigned int, llvm::ArrayRef<llvm::SlotIndex>) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x482a974)
#11 0x000055d109a70bd7 llvm::LiveRangeCalc::extend(llvm::LiveRange&, llvm::SlotIndex, unsigned int, llvm::ArrayRef<llvm::SlotIndex>) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x4829bd7)
#12 0x000055d109a7475a llvm::LiveIntervalCalc::extendToUses(llvm::LiveRange&, llvm::Register, llvm::LaneBitmask, llvm::LiveInterval*) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x482d75a)
#13 0x000055d109a5c4c3 llvm::LiveIntervals::computeRegUnitRange(llvm::LiveRange&, unsigned int) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x48154c3)
#14 0x000055d109a6024b llvm::LiveIntervals::HMEditor::updateAllRanges(llvm::MachineInstr*) LiveIntervals.cpp:0:0
#15 0x000055d109a5fe22 llvm::LiveIntervals::handleMove(llvm::MachineInstr&, bool) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x4818e22)
#16 0x000055d109c0155f llvm::ScheduleDAGMI::moveInstruction(llvm::MachineInstr*, llvm::MachineInstrBundleIterator<llvm::MachineInstr, false>) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x49ba55f)
#17 0x000055d109c08be2 llvm::ScheduleDAGMILive::scheduleMI(llvm::SUnit*, bool) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x49c1be2)
#18 0x000055d109c08262 llvm::ScheduleDAGMILive::schedule() (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x49c1262)
#19 0x000055d109bffa39 llvm::impl_detail::MachineSchedulerBase::scheduleRegions(llvm::ScheduleDAGInstrs&, bool) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x49b8a39)
#20 0x000055d109bff3fa llvm::impl_detail::MachineSchedulerImpl::run(llvm::MachineFunction&, llvm::TargetMachine const&, llvm::impl_detail::MachineSchedulerImpl::RequiredAnalyses const&) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x49b83fa)
#21 0x000055d109c151f3 (anonymous namespace)::MachineSchedulerLegacy::runOnMachineFunction(llvm::MachineFunction&) MachineScheduler.cpp:0:0
#22 0x000055d109b332f3 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x48ec2f3)
#23 0x000055d10a0aba49 llvm::FPPassManager::runOnFunction(llvm::Function&) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x4e64a49)
#24 0x000055d10a0b4332 llvm::FPPassManager::runOnModule(llvm::Module&) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x4e6d332)
#25 0x000055d10a0ac4f2 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x4e654f2)
#26 0x000055d10837b75d compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#27 0x000055d108378eb0 main (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x3131eb0)
#28 0x00007f146a435488 (/usr/lib/libc.so.6+0x27488)
#29 0x00007f146a43554c __libc_start_main (/usr/lib/libc.so.6+0x2754c)
#30 0x000055d108374ce5 _start (/mnt/nvme/tmp/cvise.DtPcjCvPux/install/llvm-7763119c6eb0976e4836f81c9876c49a36d46d73/bin/llc+0x312dce5)
```

If there is any other information I can provide, please let me know.

https://github.com/llvm/llvm-project/pull/116984


More information about the llvm-commits mailing list