[llvm] 2077d40 - [SLP]Add a test with non-power-of-2 reduction for ctpop, NFC

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2025-02-14T05:09:06-08:00
New Revision: 2077d405f0fa8482d71ccd2a1d228ffda2b0b496

URL: https://github.com/llvm/llvm-project/commit/2077d405f0fa8482d71ccd2a1d228ffda2b0b496
DIFF: https://github.com/llvm/llvm-project/commit/2077d405f0fa8482d71ccd2a1d228ffda2b0b496.diff

LOG: [SLP]Add a test with non-power-of-2 reduction for ctpop, NFC

>From #127177

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/ctpop-non-power-of-2-reduction.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/ctpop-non-power-of-2-reduction.ll b/llvm/test/Transforms/SLPVectorizer/X86/ctpop-non-power-of-2-reduction.ll
new file mode 100644
index 0000000000000..8c4c83a8154a9
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/ctpop-non-power-of-2-reduction.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define i8 @test() {
+; CHECK-LABEL: define i8 @test() {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP0:%.*]] = call i8 @llvm.ctpop.i8(i8 0)
+; CHECK-NEXT:    [[TMP1:%.*]] = call i4 @llvm.ctpop.i4(i4 1)
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i4 [[TMP1]] to i8
+; CHECK-NEXT:    [[OP_RDX:%.*]] = add i8 [[TMP0]], [[TMP2]]
+; CHECK-NEXT:    ret i8 [[OP_RDX]]
+;
+entry:
+  %inc.1.i.i = zext i1 false to i8
+  %inc.2.i.i = zext i1 false to i8
+  %inc.3.i.i = zext i1 false to i8
+  %inc.6.i.i = zext i1 false to i8
+  %inc.7.i.i = zext i1 false to i8
+  %inc.8.i.i = zext i1 false to i8
+  %inc.10.i.i = zext i1 false to i8
+  %inc.11.i.i = zext i1 false to i8
+  %inc.12.i.i = zext i1 true to i8
+  %inc.13.i.i = zext i1 false to i8
+  %inc.14.i.i = zext i1 false to i8
+  %inc.15.i.i = zext i1 false to i8
+  %inc9.1.i.i = add i8 %inc.2.i.i, %inc.1.i.i
+  %inc9.2.i.i = add i8 %inc9.1.i.i, %inc.3.i.i
+  %spec.select17.i.i = add i8 %inc9.2.i.i, %inc.6.i.i
+  %spec.select18.i.i = add i8 %spec.select17.i.i, %inc.7.i.i
+  %spec.select19.i.i = add i8 %spec.select18.i.i, %inc.8.i.i
+  %spec.select21.i.i = add i8 %spec.select19.i.i, %inc.10.i.i
+  %spec.select22.i.i = add i8 %spec.select21.i.i, %inc.11.i.i
+  %spec.select23.i.i = add i8 %spec.select22.i.i, %inc.12.i.i
+  %spec.select24.i.i = add i8 %spec.select23.i.i, %inc.13.i.i
+  %spec.select25.i.i = add i8 %spec.select24.i.i, %inc.14.i.i
+  %spec.select26.i.i = add i8 %spec.select25.i.i, %inc.15.i.i
+  ret i8 %spec.select26.i.i
+}