[llvm] 0b49001 - [X86] Add test coverage for #9297

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-02-14T11:38:47Z
New Revision: 0b49001853fa4bff76d102f592d55949bfde5fde

URL: https://github.com/llvm/llvm-project/commit/0b49001853fa4bff76d102f592d55949bfde5fde
DIFF: https://github.com/llvm/llvm-project/commit/0b49001853fa4bff76d102f592d55949bfde5fde.diff

LOG: [X86] Add test coverage for #9297

(using bugzilla id for PR)

Added: 
    llvm/test/CodeGen/X86/pr8925.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/pr8925.ll b/llvm/test/CodeGen/X86/pr8925.ll
new file mode 100644
index 0000000000000..674c1bfd09ee3
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr8925.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+
+define fastcc i32* @force.ri32(i32* %x) nounwind {
+; X86-LABEL: force.ri32:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    testl %ecx, %ecx
+; X86-NEXT:    je .LBB0_2
+; X86-NEXT:  # %bb.1: # %Limpl0.pre
+; X86-NEXT:    movl %ecx, %eax
+; X86-NEXT:    retl
+; X86-NEXT:  .LBB0_2: # %Limpl1.pre
+; X86-NEXT:    calll pr.error at PLT
+;
+; X64-LABEL: force.ri32:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    testq %rdi, %rdi
+; X64-NEXT:    je .LBB0_2
+; X64-NEXT:  # %bb.1: # %Limpl0.pre
+; X64-NEXT:    movq %rdi, %rax
+; X64-NEXT:    retq
+; X64-NEXT:  .LBB0_2: # %Limpl1.pre
+; X64-NEXT:    pushq %rax
+; X64-NEXT:    callq pr.error at PLT
+entry:
+  %nz = icmp eq i32* %x, null
+  br i1 %nz, label %Limpl1.pre, label %Limpl0.pre
+
+Limpl0.pre:                                       ; preds = %entry
+  ret i32* %x
+
+Limpl1.pre:                                       ; preds = %entry
+  tail call fastcc void @pr.error() noreturn nounwind
+  unreachable
+}
+
+declare fastcc void @pr.error() noreturn nounwind