[llvm] [AMDGPU][MachineRegisterInfo] Extend the MRI live-ins check to account for Subreg (PR #126926)
Christudasan Devadasan via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 14 01:39:52 PST 2025
================
@@ -1020,7 +1020,7 @@ class MachineRegisterInfo {
return LiveIns;
}
- bool isLiveIn(Register Reg) const;
+ bool isLiveIn(Register Reg, bool CheckForSubreg = false) const;
----------------
cdevadas wrote:
> Makes sense to me, but it would quite a huge task, as live-ins appeared & represented differently across different places need to be handled :
>
> In MBB, live-ins are stored as physreg + lane mask (regunit based implementation)
> In MachinFunction, live-ins are just pair of <PhysReg, VirtualReg> in association
> In MachineVerfier, MBB's live-ins are calculated as the physReg & all its subregs
We should eventually port them to use regunits.
https://github.com/llvm/llvm-project/pull/126926
More information about the llvm-commits
mailing list