[llvm] e750c7e - [RISCV] Set Feature32Bit/Feature64Bit based on triple for -mcpu=help. (#127031)
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Thu Feb 13 09:07:27 PST 2025
Author: Craig Topper
Date: 2025-02-13T09:07:23-08:00
New Revision: e750c7e636f083c48a6cea7fae37ffc3734c7da0
URL: https://github.com/llvm/llvm-project/commit/e750c7e636f083c48a6cea7fae37ffc3734c7da0
DIFF: https://github.com/llvm/llvm-project/commit/e750c7e636f083c48a6cea7fae37ffc3734c7da0.diff
LOG: [RISCV] Set Feature32Bit/Feature64Bit based on triple for -mcpu=help. (#127031)
llvm-mc keeps going after printing help text and creates an assembler.
If we don't set one of the XLen sized feature bits we trip a fatal error
in RISCVFeatures::validate.
llvm-mc should probably be fixed, but I don't know if its the only tool
with this issue.
Added:
Modified:
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
index 2853881780aa8..269f2e24bdf6b 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
@@ -89,7 +89,22 @@ static MCSubtargetInfo *createRISCVMCSubtargetInfo(const Triple &TT,
if (CPU.empty() || CPU == "generic")
CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
- return createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
+ MCSubtargetInfo *X =
+ createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
+
+ // If the CPU is "help" fill in 64 or 32 bit feature so we can pass
+ // RISCVFeatures::validate.
+ // FIXME: Why does llvm-mc still expect a source file with -mcpu=help?
+ if (CPU == "help") {
+ llvm::FeatureBitset Features = X->getFeatureBits();
+ if (TT.isArch64Bit())
+ Features.set(RISCV::Feature64Bit);
+ else
+ Features.set(RISCV::Feature32Bit);
+ X->setFeatureBits(Features);
+ }
+
+ return X;
}
static MCInstPrinter *createRISCVMCInstPrinter(const Triple &T,
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