[llvm] [RISCV][NFC] Fix a warning (PR #127090)

via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 13 08:36:35 PST 2025


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Piotr Fusik (pfusik)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/127090.diff


1 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp (+4-4) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp b/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
index efd92c55e3adf..ccc86da340440 100644
--- a/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
@@ -159,10 +159,10 @@ bool RISCVVMV0Elimination::runOnMachineFunction(MachineFunction &MF) {
         if (MO.isReg() && MO.getReg().isVirtual() &&
             MRI.getRegClass(MO.getReg()) == &RISCV::VMV0RegClass) {
           MRI.recomputeRegClass(MO.getReg());
-          assert(MRI.getRegClass(MO.getReg()) != &RISCV::VMV0RegClass ||
-                 MI.isInlineAsm() ||
-                 MRI.getVRegDef(MO.getReg())->isInlineAsm() &&
-                     "Non-inline-asm use of vmv0 left behind");
+          assert((MRI.getRegClass(MO.getReg()) != &RISCV::VMV0RegClass ||
+                  MI.isInlineAsm() ||
+                  MRI.getVRegDef(MO.getReg())->isInlineAsm()) &&
+                 "Non-inline-asm use of vmv0 left behind");
         }
       }
     }

``````````

</details>


https://github.com/llvm/llvm-project/pull/127090


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