[llvm] [NVPTX] Fix vaarg store alignment (PR #127067)

[Alexander Peskov via llvm-commits]

https://github.com/apeskov updated https://github.com/llvm/llvm-project/pull/127067

>From 850f0be7fdfc20a7b9581b7bec99e832a883885d Mon Sep 17 00:00:00 2001
From: Alexander Peskov <apeskov at nvidia.com>
Date: Tue, 4 Feb 2025 22:08:36 +0400
Subject: [PATCH 1/2] [NVPTX] Fix vaarg store alignment

Existing vaargs.ll test has an issue with inconsistent alignment used for
store and load of vaarg. In fact PTX code from this test will not work
correctly.

This patch applies additional alignment check into LowerCall to avoid
this discreapancy.
---
 llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp |  6 ++++++
 llvm/test/CodeGen/NVPTX/vaargs.ll           | 10 +++++-----
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index d18f25cb6fd48..340edea0d9298 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -1607,6 +1607,12 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
         StoreOperands.push_back(
             DAG.getConstant(IsVAArg ? FirstVAArg : ParamCount, dl, MVT::i32));
 
+        if (!IsByVal && IsVAArg) {
+          // Align each part of the variadic argument to their type.
+          VAOffset = alignTo(VAOffset, DL.getABITypeAlign(
+              EltVT.getTypeForEVT(*DAG.getContext())));
+        }
+
         StoreOperands.push_back(DAG.getConstant(
             IsByVal ? CurOffset + VAOffset : (IsVAArg ? VAOffset : CurOffset),
             dl, MVT::i32));
diff --git a/llvm/test/CodeGen/NVPTX/vaargs.ll b/llvm/test/CodeGen/NVPTX/vaargs.ll
index 697bdcd935fae..465e2a6a60eb5 100644
--- a/llvm/test/CodeGen/NVPTX/vaargs.ll
+++ b/llvm/test/CodeGen/NVPTX/vaargs.ll
@@ -89,12 +89,12 @@ define i32 @test_foo(i32 %i, i64 %l, double %d, ptr %p) {
 ; CHECK-NEXT:    ld.param.u32 [[ARG_I32:%r[0-9]+]], [test_foo_param_0];
 
 ; Store arguments to an array
-; CHECK32:  .param .align 8 .b8 param1[24];
-; CHECK64:  .param .align 8 .b8 param1[28];
+; CHECK32:  .param .align 8 .b8 param1[28];
+; CHECK64:  .param .align 8 .b8 param1[32];
 ; CHECK-NEXT:    st.param.b32 [param1], [[ARG_I32]];
-; CHECK-NEXT:    st.param.b64 [param1+4], [[ARG_I64]];
-; CHECK-NEXT:    st.param.f64 [param1+12], [[ARG_DOUBLE]];
-; CHECK-NEXT:    st.param.b[[BITS]] [param1+20], [[ARG_VOID_PTR]];
+; CHECK-NEXT:    st.param.b64 [param1+8], [[ARG_I64]];
+; CHECK-NEXT:    st.param.f64 [param1+16], [[ARG_DOUBLE]];
+; CHECK-NEXT:    st.param.b[[BITS]] [param1+24], [[ARG_VOID_PTR]];
 ; CHECK-NEXT:    .param .b32 retval0;
 ; CHECK-NEXT:    prototype_1 : .callprototype (.param .b32 _) _ (.param .b32 _, .param .align 8 .b8 _[]
 

>From a8b3ce5639baaee35e9bea17fddb70ea401a26a1 Mon Sep 17 00:00:00 2001
From: Alexander Peskov <apeskov at nvidia.com>
Date: Thu, 13 Feb 2025 18:48:54 +0400
Subject: [PATCH 2/2] fix clang-format

---
 llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index 340edea0d9298..5d2dfe76b1b98 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -1609,8 +1609,8 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
 
         if (!IsByVal && IsVAArg) {
           // Align each part of the variadic argument to their type.
-          VAOffset = alignTo(VAOffset, DL.getABITypeAlign(
-              EltVT.getTypeForEVT(*DAG.getContext())));
+          VAOffset = alignTo(VAOffset, DL.getABITypeAlign(EltVT.getTypeForEVT(
+                                           *DAG.getContext())));
         }
 
         StoreOperands.push_back(DAG.getConstant(