[llvm] [RISCV] Default to MicroOpBufferSize = 1 for scheduling purposes (PR #126608)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 13 04:05:08 PST 2025
wangpc-pp wrote:
> Did the swap from NoSchedModel to SchedMachineModel change some default latencies?
No I don't think so. But we may need to define sched classes for `GenericModel`.
Besides, you may try it with `-mllvm -misched-cyclicpath=false`:
https://github.com/llvm/llvm-project/blob/6fb1d40992ac3aff84dfe7616ea7776e1c26ba99/llvm/lib/CodeGen/MachineScheduler.cpp#L3544-L3547
I think this is the major influenced part apart from cycles.
https://github.com/llvm/llvm-project/pull/126608
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