[llvm] [ARM] Fix MRC cp10 and cp11 warning (PR #126407)

via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 13 03:33:23 PST 2025


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@@ -172,9 +172,13 @@
 
         @ p10 and p11 are reserved for NEON
         mcr p10, #2, r5, c1, c1, #4
-        mcrr p11, #8, r5, r4, c1
-@ CHECK-WARN: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
-@ CHECK-WARN: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
+        mcr p11, #2, r5, c1, c1, #4
+        mrc p10, #7, r5, c1, c1, #0
+        mrc p11, #7, r5, c1, c1, #0
+@ CHECK-ERROR-V7: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
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hstk30-hw wrote:

In armv8 is an error: invalid operand for instruction

https://github.com/llvm/llvm-project/pull/126407


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