[llvm] [RISCV] Emit .note.gnu.property section when Zicfiss-based shadow stack is enabled (PR #127036)
Ming-Yi Lai via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 13 02:49:19 PST 2025
https://github.com/mylai-mtk updated https://github.com/llvm/llvm-project/pull/127036
>From 6e4ba60f3e2c31dde4728216828d0b8acbbc84cf Mon Sep 17 00:00:00 2001
From: Ming-Yi Lai <ming-yi.lai at mediatek.com>
Date: Fri, 24 Jan 2025 18:42:35 +0800
Subject: [PATCH] [RISCV] Emit .note.gnu.property section when Zicfiss-based
shadow stack is enabled
RISC-V Zicfiss-based shadow stack needs to let the linker/loader know if the
binary is built with the mechanism enabled to support proper
link-time/load-time management of this feature. The information is encoded as a
bit in the `.note.gnu.property` section. This patch implements emitting the
section for RISC-V targets when Zicfiss-based shadow stack is enabled.
When Clang receives the `-fcf-protection=return` flag, it adds the
`hw-shadow-stack` attribute to LLVM functions, and adds a non-zero valued
attribute named `cf-protection-return` to the LLVM module it generates. The
backend depends on the `hw-shadow-stack` attributes to generate Zicfiss-based
shadow stack instructions for each function, but at the module scope, the
`cf-protection-return` attribute is a better indication of whether the
translation unit is built with Zicfiss-based shadow stack enabled, so this
patch emits the `.note.gnu.property` section with the "Zicfiss-based shadow
stack" bit toggled on when it sees the `cf-protection-return` attribute.
---
.../MCTargetDesc/RISCVTargetStreamer.cpp | 67 +++++++++++++++++++
.../RISCV/MCTargetDesc/RISCVTargetStreamer.h | 1 +
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 15 ++++-
.../RISCV/note-gnu-property-zicfiss.ll | 13 ++++
4 files changed, 95 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index 72b3e56c8a72f..7d603c38dd3d5 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -13,8 +13,14 @@
#include "RISCVTargetStreamer.h"
#include "RISCVBaseInfo.h"
#include "RISCVMCTargetDesc.h"
+#include "llvm/BinaryFormat/ELF.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCSectionELF.h"
+#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/RISCVAttributes.h"
#include "llvm/TargetParser/RISCVISAInfo.h"
@@ -51,6 +57,67 @@ void RISCVTargetStreamer::emitTextAttribute(unsigned Attribute,
void RISCVTargetStreamer::emitIntTextAttribute(unsigned Attribute,
unsigned IntValue,
StringRef StringValue) {}
+
+void RISCVTargetStreamer::emitNoteGnuPropertySection(
+ const uint32_t Feature1And) {
+ MCStreamer &OutStreamer = getStreamer();
+ MCContext &Ctx = OutStreamer.getContext();
+
+ const Triple &Triple = Ctx.getTargetTriple();
+ Align NoteAlign;
+ if (Triple.isArch64Bit())
+ NoteAlign = Align(8);
+ else if (Triple.isArch32Bit())
+ NoteAlign = Align(4);
+ else
+ report_fatal_error("unsupported arch bit width");
+
+ MCSection *NoteSection;
+ switch (Ctx.getObjectFileType()) {
+ case MCContext::Environment::IsELF:
+ NoteSection =
+ Ctx.getELFSection(".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC);
+ break;
+ case MCContext::Environment::IsMachO:
+ case MCContext::Environment::IsGOFF:
+ case MCContext::Environment::IsCOFF:
+ case MCContext::Environment::IsSPIRV:
+ case MCContext::Environment::IsWasm:
+ case MCContext::Environment::IsXCOFF:
+ case MCContext::Environment::IsDXContainer:
+ report_fatal_error("unsupported object file type");
+ }
+ NoteSection->setAlignment(NoteAlign);
+ OutStreamer.pushSection();
+ OutStreamer.switchSection(NoteSection);
+
+ // Emit the note header
+ OutStreamer.emitIntValue(4, 4); // n_namsz
+
+ MCSymbol *const NDescBeginSym = Ctx.createTempSymbol();
+ MCSymbol *const NDescEndSym = Ctx.createTempSymbol();
+ const MCExpr *const NDescSzExpr =
+ MCBinaryExpr::createSub(MCSymbolRefExpr::create(NDescEndSym, Ctx),
+ MCSymbolRefExpr::create(NDescBeginSym, Ctx), Ctx);
+
+ OutStreamer.emitValue(NDescSzExpr, 4); // n_descsz
+ OutStreamer.emitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4); // n_type
+ OutStreamer.emitBytes(StringRef("GNU", 4)); // n_name
+
+ // Emit n_desc field
+ OutStreamer.emitLabel(NDescBeginSym);
+ OutStreamer.emitValueToAlignment(NoteAlign);
+
+ // Emit the feature_1_and property
+ OutStreamer.emitIntValue(ELF::GNU_PROPERTY_RISCV_FEATURE_1_AND, 4); // pr_type
+ OutStreamer.emitIntValue(4, 4); // pr_datasz
+ OutStreamer.emitIntValue(Feature1And, 4); // pr_data
+ OutStreamer.emitValueToAlignment(NoteAlign); // pr_padding
+
+ OutStreamer.emitLabel(NDescEndSym);
+ OutStreamer.popSection();
+}
+
void RISCVTargetStreamer::setTargetABI(RISCVABI::ABI ABI) {
assert(ABI != RISCVABI::ABI_Unknown && "Improperly initialized target ABI");
TargetABI = ABI;
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
index cb8bc21cb6355..811157f16fff2 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
@@ -56,6 +56,7 @@ class RISCVTargetStreamer : public MCTargetStreamer {
virtual void emitTextAttribute(unsigned Attribute, StringRef String);
virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
StringRef StringValue);
+ void emitNoteGnuPropertySection(const uint32_t Feature1And);
void emitTargetAttributes(const MCSubtargetInfo &STI, bool EmitStackAlign);
void setTargetABI(RISCVABI::ABI ABI);
diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
index 7dcf2ba2ac405..c0ead6e3b989f 100644
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -108,6 +108,8 @@ class RISCVAsmPrinter : public AsmPrinter {
void emitFunctionEntryLabel() override;
bool emitDirectiveOptionArch();
+ void emitNoteGnuProperty(const Module &M);
+
private:
void emitAttributes(const MCSubtargetInfo &SubtargetInfo);
@@ -578,8 +580,10 @@ void RISCVAsmPrinter::emitEndOfAsmFile(Module &M) {
RISCVTargetStreamer &RTS =
static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
- if (TM.getTargetTriple().isOSBinFormatELF())
+ if (TM.getTargetTriple().isOSBinFormatELF()) {
RTS.finishAttributeSection();
+ emitNoteGnuProperty(M);
+ }
EmitHwasanMemaccessSymbols(M);
}
@@ -938,6 +942,15 @@ void RISCVAsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
}
}
+void RISCVAsmPrinter::emitNoteGnuProperty(const Module &M) {
+ if (const Metadata *const Flag = M.getModuleFlag("cf-protection-return");
+ Flag && !mdconst::extract<ConstantInt>(Flag)->isZero()) {
+ RISCVTargetStreamer &RTS =
+ static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
+ RTS.emitNoteGnuPropertySection(ELF::GNU_PROPERTY_RISCV_FEATURE_1_CFI_SS);
+ }
+}
+
static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
const AsmPrinter &AP) {
MCContext &Ctx = AP.OutContext;
diff --git a/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
new file mode 100644
index 0000000000000..42e4ceecf9a10
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
@@ -0,0 +1,13 @@
+; RUN: llc --mtriple=riscv32-unknown-linux-gnu --filetype=obj -o - %s | llvm-readelf -n - | FileCheck %s
+; RUN: llc --mtriple=riscv64-unknown-linux-gnu --filetype=obj -o - %s | llvm-readelf -n - | FileCheck %s
+
+; CHECK: Properties: RISC-V feature: ZICFISS
+
+define i32 @f() "hw-shadow-stack" {
+entry:
+ ret i32 0
+}
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 8, !"cf-protection-return", i32 1}
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