[llvm] [MachineScheduler][RISCV] Release the pending queue base on condition (PR #125468)

[Piyou Chen via llvm-commits]

BeMg wrote:

> Do you still see the spill/reload even with real CPU scheduling model? I wonder if the problem you are trying to solve is the same as #107532?

In most cases, yes. The lit changes in https://github.com/llvm/llvm-project/pull/126608 will cover this patch's lit changes.
I think the difference is that even when we set MicroOpBufferSize = 1, it still keeps some Nodes in the pending queue because checkHazard returns true.

https://github.com/llvm/llvm-project/blob/d222488007b294e897fb5c29971d87c3148ae33b/llvm/lib/CodeGen/MachineScheduler.cpp#L2463

This patch aims to resolve this type of problem (balance hazard and spilling) that setting MicroOpBufferSize = 1 cannot address.

https://github.com/llvm/llvm-project/pull/125468