[llvm] [AArch64] Add support for 16/32/64-bit floating-point atomic read-modify-write ops (PR #125686)

[Jonathan Thackray via llvm-commits]

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@@ -13,20 +13,37 @@
 ]
 
 
-# Type name size
-class Type(enum.Enum):
-    # Value is the size in bytes
-    i8 = 1
-    i16 = 2
-    i32 = 4
-    i64 = 8
-    i128 = 16
-
-    def align(self, aligned: bool) -> int:
-        return self.value if aligned else 1
+class byteSizes:
+    def __init__(self):
+        self._data = {}
 
-    def __str__(self) -> str:
-        return self.name
+    def __setitem__(self, k, v):
+        self._data[k] = v
+
+    def __getitem__(self, k):
+        return self._data[k]
+
+    def __iter__(self):
+        return iter(self._data.items())
+
+
+def align(val, aligned: bool) -> int:
+    return val if aligned else 1
+
+
+# Value is the size in bytes
+Type = byteSizes()
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jthackray wrote:

I've improved the code, and moved it to a separate pre-commit PR (as suggested by Tomas and the llvm docs) in #126643.

https://github.com/llvm/llvm-project/pull/125686