[llvm] [Xtensa] Implement Xtensa Boolean Option. (PR #126022)

[Matt Arsenault via llvm-commits]

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@@ -98,6 +98,22 @@ static DecodeStatus DecodeSRRegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Fail;
 }
 
+const unsigned BRDecoderTable[] = {
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arsenm wrote:

MCPhysReg? 

https://github.com/llvm/llvm-project/pull/126022