[llvm] [RISCV][VLOPT] Add support for Vector Fixed-Point Arithmetic Instructions (PR #126483)

[Pengcheng Wang via llvm-commits]

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@@ -1173,8 +1201,16 @@ bool RISCVVLOptimizer::isCandidate(const MachineInstr &MI) const {
   const MCInstrDesc &Desc = MI.getDesc();
   if (!RISCVII::hasVLOp(Desc.TSFlags) || !RISCVII::hasSEWOp(Desc.TSFlags))
     return false;
-  if (MI.getNumDefs() != 1)
+
+  if (MI.getNumExplicitDefs() != 1)
+    return false;
+
+  // Some instructions have implicit defs e.g. $vxsat. If they might be read
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wangpc-pp wrote:

Wait, if so, we can't reduce VL for floating-point instructions since they may raise some exceptions and change fcsr value?

https://github.com/llvm/llvm-project/pull/126483