[llvm] [X86] Fold (v4i32 (scalar_to_vector (i32 (zext (bitcast (f16)))))) -> (v4i32 bitcast (shuffle (v8f16 scalar_to_vector))) (PR #126033)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 10 01:26:14 PST 2025
https://github.com/RKSimon updated https://github.com/llvm/llvm-project/pull/126033
>From 0dd93c735d4c1f9cd3608b2f6d28e2e98277d063 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Thu, 6 Feb 2025 09:33:53 +0000
Subject: [PATCH] [X86] Fold (v4i32 (scalar_to_vector (i32 (zextext (bitcast
(f16)))))) -> (v4i32 bitcast (shuffle (v8f16 scalar_to_vector)))
Extension to #123338
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 10 +-
.../CodeGen/X86/canonicalize-vars-f16-type.ll | 18 +-
.../CodeGen/X86/fminimumnum-fmaximumnum.ll | 4 +-
llvm/test/CodeGen/X86/fp-round.ll | 4 +-
.../CodeGen/X86/fp-strict-scalar-cmp-fp16.ll | 316 ++++++------------
.../test/CodeGen/X86/fp-strict-scalar-fp16.ll | 94 ++----
.../X86/fp-strict-scalar-fptoint-fp16.ll | 48 +--
.../X86/fp-strict-scalar-round-fp16.ll | 28 +-
llvm/test/CodeGen/X86/half-constrained.ll | 32 +-
llvm/test/CodeGen/X86/half-darwin.ll | 4 +-
10 files changed, 187 insertions(+), 371 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 744e4e740cb2102..b3df32114e331f3 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -58721,12 +58721,20 @@ static SDValue combineSCALAR_TO_VECTOR(SDNode *N, SelectionDAG &DAG,
if (VT == MVT::v4i32) {
SDValue HalfSrc;
- // Combine (v4i32 (scalar_to_vector (i32 (anyext (bitcast (f16))))))
+ // Combine (v4i32 (scalar_to_vector (i32 (a/zext (bitcast (f16))))))
// to remove XMM->GPR->XMM moves.
if (sd_match(Src, m_AnyExt(m_BitCast(
m_AllOf(m_SpecificVT(MVT::f16), m_Value(HalfSrc))))))
return DAG.getBitcast(
VT, DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v8f16, HalfSrc));
+ if (sd_match(Src, m_ZExt(m_BitCast(m_AllOf(m_SpecificVT(MVT::f16),
+ m_Value(HalfSrc)))))) {
+ SDValue R = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v8f16, HalfSrc);
+ R = DAG.getVectorShuffle(MVT::v8f16, DL, R,
+ getZeroVector(MVT::v8f16, Subtarget, DAG, DL),
+ {0, 8, -1, -1, -1, -1, -1, -1});
+ return DAG.getBitcast(VT, R);
+ }
}
// See if we're broadcasting the scalar value, in which case just reuse that.
diff --git a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
index 556b0deaf4c8306..70f04fb6df30ae6 100644
--- a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
+++ b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
@@ -43,13 +43,11 @@ define void @v_test_canonicalize__half(half addrspace(1)* %out) nounwind {
;
; AVX512-LABEL: v_test_canonicalize__half:
; AVX512: # %bb.0: # %entry
-; AVX512-NEXT: movzwl (%rdi), %eax
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx
-; AVX512-NEXT: vmovd %ecx, %xmm0
+; AVX512-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmovd %eax, %xmm1
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0
+; AVX512-NEXT: vcvtph2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -144,9 +142,7 @@ define half @complex_canonicalize_fmul_half(half %a, half %b) nounwind {
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
-; AVX512-NEXT: vmovd %eax, %xmm2
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vcvtph2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0
; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2
; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
@@ -228,9 +224,7 @@ define void @v_test_canonicalize_v2half(<2 x half> addrspace(1)* %out) nounwind
; AVX512-LABEL: v_test_canonicalize_v2half:
; AVX512: # %bb.0: # %entry
; AVX512-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
-; AVX512-NEXT: vmovd %eax, %xmm1
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512-NEXT: vcvtph2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; AVX512-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT: vmulss %xmm1, %xmm2, %xmm2
diff --git a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
index c7f5e13cb746474..bd31e7b484a50d6 100644
--- a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
+++ b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
@@ -1840,9 +1840,7 @@ define <4 x half> @test_fmaximumnum_v4f16(<4 x half> %x, <4 x half> %y) nounwind
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
-; AVX512-NEXT: vmovd %eax, %xmm1
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm9
+; AVX512-NEXT: vcvtph2ps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm9
; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[3,3,3,3]
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
diff --git a/llvm/test/CodeGen/X86/fp-round.ll b/llvm/test/CodeGen/X86/fp-round.ll
index 58c4f71892e902e..8c209c311602aab 100644
--- a/llvm/test/CodeGen/X86/fp-round.ll
+++ b/llvm/test/CodeGen/X86/fp-round.ll
@@ -50,9 +50,7 @@ define half @round_f16(half %h) {
;
; AVX512F-LABEL: round_f16:
; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpextrw $0, %xmm0, %eax
-; AVX512F-NEXT: movzwl %ax, %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4.9999997E-1,4.9999997E-1,4.9999997E-1,4.9999997E-1]
; AVX512F-NEXT: vpternlogd {{.*#+}} xmm1 = xmm1 | (xmm0 & mem)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
index 6a6b86e8efa7c33..0597f4327e43d3f 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
@@ -32,15 +32,11 @@ define i32 @test_f16_oeq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oeq_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
@@ -96,15 +92,11 @@ define i32 @test_f16_ogt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ogt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovbel %esi, %eax
; AVX-NEXT: retq
;
@@ -157,15 +149,11 @@ define i32 @test_f16_oge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oge_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovbl %esi, %eax
; AVX-NEXT: retq
;
@@ -220,13 +208,9 @@ define i32 @test_f16_olt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_olt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
@@ -283,13 +267,9 @@ define i32 @test_f16_ole_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ole_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
@@ -344,15 +324,11 @@ define i32 @test_f16_one_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_one_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovel %esi, %eax
; AVX-NEXT: retq
;
@@ -405,15 +381,11 @@ define i32 @test_f16_ord_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ord_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
;
@@ -466,15 +438,11 @@ define i32 @test_f16_ueq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ueq_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: retq
;
@@ -529,13 +497,9 @@ define i32 @test_f16_ugt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ugt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
@@ -592,13 +556,9 @@ define i32 @test_f16_uge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uge_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
@@ -653,15 +613,11 @@ define i32 @test_f16_ult_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ult_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovael %esi, %eax
; AVX-NEXT: retq
;
@@ -714,15 +670,11 @@ define i32 @test_f16_ule_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ule_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmoval %esi, %eax
; AVX-NEXT: retq
;
@@ -776,15 +728,11 @@ define i32 @test_f16_une_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_une_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %edi, %eax
; AVX-NEXT: cmovpl %edi, %eax
; AVX-NEXT: retq
@@ -840,15 +788,11 @@ define i32 @test_f16_uno_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uno_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnpl %esi, %eax
; AVX-NEXT: retq
;
@@ -902,15 +846,11 @@ define i32 @test_f16_oeq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oeq_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
@@ -966,15 +906,11 @@ define i32 @test_f16_ogt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ogt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovbel %esi, %eax
; AVX-NEXT: retq
;
@@ -1027,15 +963,11 @@ define i32 @test_f16_oge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oge_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovbl %esi, %eax
; AVX-NEXT: retq
;
@@ -1090,13 +1022,9 @@ define i32 @test_f16_olt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_olt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
@@ -1153,13 +1081,9 @@ define i32 @test_f16_ole_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ole_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
@@ -1214,15 +1138,11 @@ define i32 @test_f16_one_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_one_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovel %esi, %eax
; AVX-NEXT: retq
;
@@ -1275,15 +1195,11 @@ define i32 @test_f16_ord_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ord_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
;
@@ -1336,15 +1252,11 @@ define i32 @test_f16_ueq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ueq_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: retq
;
@@ -1399,13 +1311,9 @@ define i32 @test_f16_ugt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ugt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
@@ -1462,13 +1370,9 @@ define i32 @test_f16_uge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uge_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
@@ -1523,15 +1427,11 @@ define i32 @test_f16_ult_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ult_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovael %esi, %eax
; AVX-NEXT: retq
;
@@ -1584,15 +1484,11 @@ define i32 @test_f16_ule_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ule_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmoval %esi, %eax
; AVX-NEXT: retq
;
@@ -1646,15 +1542,11 @@ define i32 @test_f16_une_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_une_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %edi, %eax
; AVX-NEXT: cmovpl %edi, %eax
; AVX-NEXT: retq
@@ -1710,15 +1602,11 @@ define i32 @test_f16_uno_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uno_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnpl %esi, %eax
; AVX-NEXT: retq
;
@@ -1767,15 +1655,11 @@ define void @foo(half %0, half %1) #0 {
;
; AVX-LABEL: foo:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: ja bar at PLT # TAILCALL
; AVX-NEXT: # %bb.1:
; AVX-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
index fbc798d8bbe48c8..072d8f2540cb413 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
@@ -34,15 +34,11 @@ define half @fadd_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fadd_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -82,15 +78,11 @@ define half @fsub_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fsub_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vsubss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vsubss %xmm1, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -130,15 +122,11 @@ define half @fmul_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fmul_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -178,15 +166,11 @@ define half @fdiv_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fdiv_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -221,8 +205,8 @@ define void @fpext_f16_to_f32(ptr %val, ptr %ret) nounwind strictfp {
;
; AVX-LABEL: fpext_f16_to_f32:
; AVX: # %bb.0:
-; AVX-NEXT: movzwl (%rdi), %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vmovss %xmm0, (%rsi)
; AVX-NEXT: retq
@@ -263,8 +247,8 @@ define void @fpext_f16_to_f64(ptr %val, ptr %ret) nounwind strictfp {
;
; AVX-LABEL: fpext_f16_to_f64:
; AVX: # %bb.0:
-; AVX-NEXT: movzwl (%rdi), %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovsd %xmm0, (%rsi)
@@ -395,8 +379,8 @@ define void @fsqrt_f16(ptr %a) nounwind strictfp {
;
; AVX-LABEL: fsqrt_f16:
; AVX: # %bb.0:
-; AVX-NEXT: movzwl (%rdi), %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -455,17 +439,11 @@ define half @fma_f16(half %a, half %b, half %c) nounwind strictfp {
; F16C-LABEL: fma_f16:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
-; F16C-NEXT: vpextrw $0, %xmm0, %eax
-; F16C-NEXT: vpextrw $0, %xmm1, %ecx
-; F16C-NEXT: vpextrw $0, %xmm2, %edx
-; F16C-NEXT: movzwl %dx, %edx
-; F16C-NEXT: vmovd %edx, %xmm0
-; F16C-NEXT: vcvtph2ps %xmm0, %xmm2
-; F16C-NEXT: movzwl %cx, %ecx
-; F16C-NEXT: vmovd %ecx, %xmm0
-; F16C-NEXT: vcvtph2ps %xmm0, %xmm1
-; F16C-NEXT: movzwl %ax, %eax
-; F16C-NEXT: vmovd %eax, %xmm0
+; F16C-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero
+; F16C-NEXT: vcvtph2ps %xmm2, %xmm2
+; F16C-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
+; F16C-NEXT: vcvtph2ps %xmm1, %xmm1
+; F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; F16C-NEXT: callq fmaf at PLT
; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -476,21 +454,15 @@ define half @fma_f16(half %a, half %b, half %c) nounwind strictfp {
;
; AVX512-LABEL: fma_f16:
; AVX512: # %bb.0:
-; AVX512-NEXT: vpextrw $0, %xmm1, %eax
-; AVX512-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX512-NEXT: vpextrw $0, %xmm2, %edx
-; AVX512-NEXT: movzwl %dx, %edx
-; AVX512-NEXT: vmovd %edx, %xmm0
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: movzwl %cx, %ecx
-; AVX512-NEXT: vmovd %ecx, %xmm1
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: movzwl %ax, %eax
-; AVX512-NEXT: vmovd %eax, %xmm2
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm1 * xmm2) + xmm0
+; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm1 = (xmm0 * xmm1) + xmm2
; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
index 0498f9b7f9a3d0e..dc1ea3cf4c24f8c 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
@@ -28,9 +28,7 @@ define i1 @fptosi_f16toi1(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi1:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -64,9 +62,7 @@ define i8 @fptosi_f16toi8(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi8:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -100,9 +96,7 @@ define i16 @fptosi_f16toi16(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax
@@ -135,9 +129,7 @@ define i32 @fptosi_f16toi32(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: retq
@@ -167,9 +159,7 @@ define i64 @fptosi_f16toi64(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi64:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %rax
; AVX-NEXT: retq
@@ -203,9 +193,7 @@ define i1 @fptoui_f16toi1(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi1:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -239,9 +227,7 @@ define i8 @fptoui_f16toi8(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi8:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -275,9 +261,7 @@ define i16 @fptoui_f16toi16(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax
@@ -311,9 +295,7 @@ define i32 @fptoui_f16toi32(half %x) #0 {
;
; F16C-LABEL: fptoui_f16toi32:
; F16C: # %bb.0:
-; F16C-NEXT: vpextrw $0, %xmm0, %eax
-; F16C-NEXT: movzwl %ax, %eax
-; F16C-NEXT: vmovd %eax, %xmm0
+; F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; F16C-NEXT: vcvttss2si %xmm0, %rax
; F16C-NEXT: # kill: def $eax killed $eax killed $rax
@@ -321,9 +303,7 @@ define i32 @fptoui_f16toi32(half %x) #0 {
;
; AVX512-LABEL: fptoui_f16toi32:
; AVX512: # %bb.0:
-; AVX512-NEXT: vpextrw $0, %xmm0, %eax
-; AVX512-NEXT: movzwl %ax, %eax
-; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vcvttss2usi %xmm0, %eax
; AVX512-NEXT: retq
@@ -365,9 +345,7 @@ define i64 @fptoui_f16toi64(half %x) #0 {
;
; F16C-LABEL: fptoui_f16toi64:
; F16C: # %bb.0:
-; F16C-NEXT: vpextrw $0, %xmm0, %eax
-; F16C-NEXT: movzwl %ax, %eax
-; F16C-NEXT: vmovd %eax, %xmm0
+; F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; F16C-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]
; F16C-NEXT: vcomiss %xmm1, %xmm0
@@ -386,9 +364,7 @@ define i64 @fptoui_f16toi64(half %x) #0 {
;
; AVX512-LABEL: fptoui_f16toi64:
; AVX512: # %bb.0:
-; AVX512-NEXT: vpextrw $0, %xmm0, %eax
-; AVX512-NEXT: movzwl %ax, %eax
-; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vcvttss2usi %xmm0, %rax
; AVX512-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
index 1ab97dafb851475..78e3b26e4616e75 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
@@ -25,9 +25,7 @@ define half @fceil32(half %f) #0 {
;
; AVX-LABEL: fceil32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -61,9 +59,7 @@ define half @ffloor32(half %f) #0 {
;
; AVX-LABEL: ffloor32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -97,9 +93,7 @@ define half @ftrunc32(half %f) #0 {
;
; AVX-LABEL: ftrunc32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -133,9 +127,7 @@ define half @frint32(half %f) #0 {
;
; AVX-LABEL: frint32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -170,9 +162,7 @@ define half @fnearbyint32(half %f) #0 {
;
; AVX-LABEL: fnearbyint32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -207,9 +197,7 @@ define half @froundeven16(half %f) #0 {
;
; AVX-LABEL: froundeven16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -245,9 +233,7 @@ define half @fround16(half %f) #0 {
; AVX-LABEL: fround16:
; AVX: # %bb.0:
; AVX-NEXT: pushq %rax
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: callq roundf at PLT
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
diff --git a/llvm/test/CodeGen/X86/half-constrained.ll b/llvm/test/CodeGen/X86/half-constrained.ll
index 0f73129d984bd91..0dac2c47e25d710 100644
--- a/llvm/test/CodeGen/X86/half-constrained.ll
+++ b/llvm/test/CodeGen/X86/half-constrained.ll
@@ -24,8 +24,8 @@ define float @half_to_float() strictfp {
; X86-F16C: # %bb.0:
; X86-F16C-NEXT: pushl %eax
; X86-F16C-NEXT: .cfi_def_cfa_offset 8
-; X86-F16C-NEXT: movzwl a, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm0
+; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
+; X86-F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X86-F16C-NEXT: vmovss %xmm0, (%esp)
; X86-F16C-NEXT: flds (%esp)
@@ -48,8 +48,8 @@ define float @half_to_float() strictfp {
; X64-F16C-LABEL: half_to_float:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm0
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
+; X64-F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: retq
%1 = load half, ptr @a, align 2
@@ -73,8 +73,8 @@ define double @half_to_double() strictfp {
; X86-F16C: # %bb.0:
; X86-F16C-NEXT: subl $12, %esp
; X86-F16C-NEXT: .cfi_def_cfa_offset 16
-; X86-F16C-NEXT: movzwl a, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm0
+; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
+; X86-F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X86-F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; X86-F16C-NEXT: vmovsd %xmm0, (%esp)
@@ -99,8 +99,8 @@ define double @half_to_double() strictfp {
; X64-F16C-LABEL: half_to_double:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm0
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
+; X64-F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; X64-F16C-NEXT: retq
@@ -342,11 +342,11 @@ define void @add() strictfp {
;
; X86-F16C-LABEL: add:
; X86-F16C: # %bb.0:
-; X86-F16C-NEXT: movzwl a, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm0
+; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
+; X86-F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
-; X86-F16C-NEXT: movzwl b, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm1
+; X86-F16C-NEXT: vpinsrw $0, b, %xmm0, %xmm1
+; X86-F16C-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; X86-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
; X86-F16C-NEXT: vaddss %xmm1, %xmm0, %xmm0
; X86-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
@@ -378,12 +378,12 @@ define void @add() strictfp {
; X64-F16C-LABEL: add:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm0
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
+; X64-F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: movq b at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm1
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm1
+; X64-F16C-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
; X64-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
; X64-F16C-NEXT: vaddss %xmm1, %xmm0, %xmm0
; X64-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
diff --git a/llvm/test/CodeGen/X86/half-darwin.ll b/llvm/test/CodeGen/X86/half-darwin.ll
index 3cbf5c11235ea83..5f3516ae156e266 100644
--- a/llvm/test/CodeGen/X86/half-darwin.ll
+++ b/llvm/test/CodeGen/X86/half-darwin.ll
@@ -165,8 +165,8 @@ define float @strict_extendhfsf(ptr %ptr) nounwind strictfp {
;
; CHECK-F16C-LABEL: strict_extendhfsf:
; CHECK-F16C: ## %bb.0:
-; CHECK-F16C-NEXT: movzwl (%rdi), %eax
-; CHECK-F16C-NEXT: vmovd %eax, %xmm0
+; CHECK-F16C-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; CHECK-F16C-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; CHECK-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; CHECK-F16C-NEXT: retq
;
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