[llvm] [LV] Compute register usage for interleaving on VPlan. (PR #126437)

[Luke Lau via llvm-commits]

lukel97 wrote:

Nice! I had also been looking into doing this as well to address this issue where we end up with a lot of spilling due to the VF being too high: https://godbolt.org/z/P3j7978Pq

In that example the current non-VP `calculateRegisterUsage` only sees the widest element type as i8. But because it will end up getting vectorized as a gather, we'll end up generating vectors of pointers which are i64, so it underestimates the register pressure by 8 times. 

VPlan models the vector of i64 pointers and so doing `calculateRegisterUsage` in VPlan allows it to accurately calculate this.

>From what I understand `calculateRegisterUsage` is only used for `selectInterleaveCount` or `getMaximizedVFForTarget` when `TTI.shouldMaximizeVectorBandwidth` is true currently.

But I think with this change we could use it in more places for RISC-V to select a better MaxVF.

https://github.com/llvm/llvm-project/pull/126437