[clang] [llvm] [AArch64][SelectionDAG] Add CodeGen support for scalar FEAT_CPA (PR #105669)

[David Green via llvm-commits]

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@@ -5025,6 +5025,11 @@ def msve_vector_bits_EQ : Joined<["-"], "msve-vector-bits=">, Group<m_aarch64_Fe
   Visibility<[ClangOption, FlangOption]>,
   HelpText<"Specify the size in bits of an SVE vector register. Defaults to the"
            " vector length agnostic value of \"scalable\". (AArch64 only)">;
+
+def mcpa_codegen : Flag<["-"], "mcpa-codegen">,
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davemgreen wrote:

Can we make it just an internal option for the time being? Otherwise we need to agree to the interface with GCC, and I don't think that has been done yet. It might be something to add in a future patch when we are sure of the details.

https://github.com/llvm/llvm-project/pull/105669