[llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)

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git-clang-format --diff 6ef978b8c41a83378af3de1dceeea434715f80f4 d85f96fcaf2d59069782a2a06127392a54400283 --extensions h,cpp -- llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp llvm/lib/Target/NVPTX/NVPTXISelLowering.h llvm/lib/Target/NVPTX/NVPTXSubtarget.h
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diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index 92f0bffcec..b967176821 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -5686,8 +5686,7 @@ static void ReplaceCopyFromReg_128(SDNode *N, SelectionDAG &DAG,
 }
 
 static void ReplaceF32x2Op(SDNode *N, SelectionDAG &DAG,
-                           SmallVectorImpl<SDValue> &Results,
-                           bool UseFTZ) {
+                           SmallVectorImpl<SDValue> &Results, bool UseFTZ) {
   SDLoc DL(N);
   EVT OldResultTy = N->getValueType(0); // <2 x float>
   assert(OldResultTy == MVT::v2f32 && "Unexpected result type for F32x2 op!");

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https://github.com/llvm/llvm-project/pull/126337