[llvm] [SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (PR #125207)

[Paul Walker via llvm-commits]

================
@@ -11890,6 +11891,62 @@ SDValue TargetLowering::expandVECTOR_COMPRESS(SDNode *Node,
   return DAG.getLoad(VecVT, DL, Chain, StackPtr, PtrInfo);
 }
 
+SDValue TargetLowering::expandPartialReduceMLA(SDNode *N,
+                                               SelectionDAG &DAG) const {
+  SDLoc DL(N);
+  SDValue Acc = N->getOperand(0);
+  SDValue MulLHS = N->getOperand(1);
+  SDValue MulRHS = N->getOperand(2);
+  EVT ReducedTy = Acc.getValueType();
+  EVT FullTy = MulLHS.getValueType();
+
+  EVT NewVT =
+      EVT::getVectorVT(*DAG.getContext(), ReducedTy.getVectorElementType(),
+                       FullTy.getVectorElementCount());
+  unsigned ExtOpc = N->getOpcode() == ISD::PARTIAL_REDUCE_SMLA
+                        ? ISD::SIGN_EXTEND
+                        : ISD::ZERO_EXTEND;
+  EVT MulLHSVT = MulLHS.getValueType();
+  assert(MulLHSVT == MulRHS.getValueType() &&
+         "The second and third operands of a PARTIAL_REDUCE_MLA node must have "
+         "the same value type!");
----------------
paulwalker-arm wrote:

You should assume the DAG is well formed and thus this assert is unnecessary.  This is the reason behind adding the asserts to `getNode()` because it is much easier to catch failures during construction and means there's no need to pollute the DAG combines with such validation code.

https://github.com/llvm/llvm-project/pull/125207