[llvm] [lldb] add required for lldb RISCV relocations in MCJIT (PR #126266)

[via llvm-commits]

https://github.com/dlav-sc created https://github.com/llvm/llvm-project/pull/126266

After implementing CFI instructions in the function prologue, LLDB testing for RISC-V started failing due to insufficient relocations (e.g., R_RISCV_SET8, R_RISCV_SET16).

This patch adds support for the necessary RISC-V relocations in MCJIT.

>From 4499a8205d8b7f619fdaf6c8690059ea40860f64 Mon Sep 17 00:00:00 2001
From: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: Wed, 22 Jan 2025 10:03:17 +0000
Subject: [PATCH] [lldb] add required for lldb RISCV relocations in MCJIT

After implementing CFI instructions in the function prologue, LLDB
testing for RISC-V started failing due to insufficient relocations
(e.g., R_RISCV_SET8, R_RISCV_SET16).

This patch adds support for the necessary RISC-V relocations in MCJIT.
---
 llvm/include/llvm/Support/Endian.h            |  3 +++
 .../RuntimeDyld/RuntimeDyldELF.cpp            | 25 +++++++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/llvm/include/llvm/Support/Endian.h b/llvm/include/llvm/Support/Endian.h
index f86ea8901ae46b8..574f9508420a0bf 100644
--- a/llvm/include/llvm/Support/Endian.h
+++ b/llvm/include/llvm/Support/Endian.h
@@ -277,6 +277,9 @@ struct packed_endian_specific_integral {
 
 } // end namespace detail
 
+using ulittle8_t =
+    detail::packed_endian_specific_integral<uint8_t, llvm::endianness::little,
+                                            unaligned>;
 using ulittle16_t =
     detail::packed_endian_specific_integral<uint16_t, llvm::endianness::little,
                                             unaligned>;
diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
index 0fc05a47648c1df..07dfb3c1ff3a7eb 100644
--- a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
+++ b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
@@ -1306,6 +1306,11 @@ void RuntimeDyldELF::resolveRISCVRelocation(const SectionEntry &Section,
     Ref = Value + Addend;
     break;
   }
+  case ELF::R_RISCV_ADD8: {
+    auto Ref = support::ulittle8_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Ref + Value + Addend;
+    break;
+  }
   case ELF::R_RISCV_ADD16: {
     auto Ref = support::ulittle16_t::ref(Section.getAddressWithOffset(Offset));
     Ref = Ref + Value + Addend;
@@ -1321,6 +1326,11 @@ void RuntimeDyldELF::resolveRISCVRelocation(const SectionEntry &Section,
     Ref = Ref + Value + Addend;
     break;
   }
+  case ELF::R_RISCV_SUB8: {
+    auto Ref = support::ulittle8_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Ref - Value - Addend;
+    break;
+  }
   case ELF::R_RISCV_SUB16: {
     auto Ref = support::ulittle16_t::ref(Section.getAddressWithOffset(Offset));
     Ref = Ref - Value - Addend;
@@ -1336,6 +1346,21 @@ void RuntimeDyldELF::resolveRISCVRelocation(const SectionEntry &Section,
     Ref = Ref - Value - Addend;
     break;
   }
+  case ELF::R_RISCV_SET8: {
+    auto Ref = support::ulittle8_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Value + Addend;
+    break;
+  }
+  case ELF::R_RISCV_SET16: {
+    auto Ref = support::ulittle16_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Value + Addend;
+    break;
+  }
+  case ELF::R_RISCV_SET32: {
+    auto Ref = support::ulittle32_t::ref(Section.getAddressWithOffset(Offset));
+    Ref = Value + Addend;
+    break;
+  }
   }
 }