[llvm] Reduce shl64 to shl32 if shift range is [63-32] (PR #125574)

[via llvm-commits]

LU-JOHN wrote:

> I mean a 32-bit shift that is reducible to 16-bit. Everything just half sized. We should do that, but it's trickier because we don't want to force vector usage in scalar contexts

Should I generalize the reduction to include shl32 -> shl16?

https://github.com/llvm/llvm-project/pull/125574