[llvm] [ARM] Reject fixed-point VCVT with different registers (PR #126232)

Oliver Stannard via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 7 05:53:26 PST 2025


ostannard wrote:

The tablegen does have a way to mark two operands as being tied, but as far as I can tell that's only used for codegen, not assembly.

https://github.com/llvm/llvm-project/pull/126232


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