[llvm] [SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (PR #125207)

[James Chesterman via llvm-commits]

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@@ -1358,6 +1365,9 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
       setOperationAction(ISD::BSWAP, VT, Expand);
       setOperationAction(ISD::CTTZ, VT, Expand);
 
+      setOperationAction(ISD::PARTIAL_REDUCE_UMLA, VT, Expand);
+      setOperationAction(ISD::PARTIAL_REDUCE_SMLA, VT, Expand);
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JamesChesterman wrote:

Done

https://github.com/llvm/llvm-project/pull/125207