[llvm] [CodeGen][NPM] MachineScheduler: Inline constructors (PR #126220)

[Akshat Oke via llvm-commits]

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/126220

Attempt to fix the compile-time regression introduced by #125703

This seems to make it better on my machine, but I cannot say for sure as the times keep changing (even taking an average over multiple runs)

>From d0e46dfa9fe63267e278933a24275215afd375ee Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Fri, 7 Feb 2025 10:11:01 +0000
Subject: [PATCH] [CodeGen][NPM] MachineScheduler: Inline constructors

---
 llvm/lib/CodeGen/MachineScheduler.cpp | 107 +++++++++++---------------
 1 file changed, 46 insertions(+), 61 deletions(-)

diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index de7714522541472..703ae4ab8abddff 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -228,10 +228,29 @@ class MachineSchedulerImpl : public MachineSchedulerBase {
   MachineFunctionAnalysisManager *MFAM = nullptr;
 
 public:
-  MachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P);
+  MachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P) : P(P) {
+    MF = &Func;
+    MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
+    MDT = &P->getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
+    TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
+    AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
+    LIS = &P->getAnalysis<LiveIntervalsWrapperPass>().getLIS();
+  }
+
   MachineSchedulerImpl(MachineFunction &Func,
                        MachineFunctionAnalysisManager &MFAM,
-                       const TargetMachine *TargetM);
+                       const TargetMachine *TargetM)
+      : MFAM(&MFAM) {
+    MF = &Func;
+    TM = TargetM;
+    MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
+    MDT = &MFAM.getResult<MachineDominatorTreeAnalysis>(Func);
+    auto &FAM =
+        MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
+            .getManager();
+    AA = &FAM.getResult<AAManager>(Func.getFunction());
+    LIS = &MFAM.getResult<LiveIntervalsAnalysis>(Func);
+  }
   bool run();
 
 protected:
@@ -244,10 +263,26 @@ class PostMachineSchedulerImpl : public MachineSchedulerBase {
   MachineFunctionAnalysisManager *MFAM = nullptr;
 
 public:
-  PostMachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P);
+  PostMachineSchedulerImpl(MachineFunction &Func, MachineFunctionPass *P)
+      : P(P) {
+    MF = &Func;
+    MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
+    TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
+    AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
+  }
+
   PostMachineSchedulerImpl(MachineFunction &Func,
                            MachineFunctionAnalysisManager &MFAM,
-                           const TargetMachine *TargetM);
+                           const TargetMachine *TargetM)
+      : MFAM(&MFAM) {
+    MF = &Func;
+    TM = TargetM;
+    MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
+    auto &FAM =
+        MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
+            .getManager();
+    AA = &FAM.getResult<AAManager>(Func.getFunction());
+  }
   bool run();
 
 protected:
@@ -257,7 +292,9 @@ class PostMachineSchedulerImpl : public MachineSchedulerBase {
 /// MachineScheduler runs after coalescing and before register allocation.
 class MachineSchedulerLegacy : public MachineFunctionPass {
 public:
-  MachineSchedulerLegacy();
+  MachineSchedulerLegacy() : MachineFunctionPass(ID) {
+    initializeMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
+  }
   void getAnalysisUsage(AnalysisUsage &AU) const override;
   bool runOnMachineFunction(MachineFunction&) override;
 
@@ -267,7 +304,10 @@ class MachineSchedulerLegacy : public MachineFunctionPass {
 /// PostMachineScheduler runs after shortly before code emission.
 class PostMachineSchedulerLegacy : public MachineFunctionPass {
 public:
-  PostMachineSchedulerLegacy();
+  PostMachineSchedulerLegacy() : MachineFunctionPass(ID) {
+    initializePostMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
+  }
+
   void getAnalysisUsage(AnalysisUsage &AU) const override;
   bool runOnMachineFunction(MachineFunction&) override;
 
@@ -290,10 +330,6 @@ INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
 INITIALIZE_PASS_END(MachineSchedulerLegacy, DEBUG_TYPE,
                     "Machine Instruction Scheduler", false, false)
 
-MachineSchedulerLegacy::MachineSchedulerLegacy() : MachineFunctionPass(ID) {
-  initializeMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
-}
-
 void MachineSchedulerLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.setPreservesCFG();
   AU.addRequired<MachineDominatorTreeWrapperPass>();
@@ -319,11 +355,6 @@ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
 INITIALIZE_PASS_END(PostMachineSchedulerLegacy, "postmisched",
                     "PostRA Machine Instruction Scheduler", false, false)
 
-PostMachineSchedulerLegacy::PostMachineSchedulerLegacy()
-    : MachineFunctionPass(ID) {
-  initializePostMachineSchedulerLegacyPass(*PassRegistry::getPassRegistry());
-}
-
 void PostMachineSchedulerLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.setPreservesCFG();
   AU.addRequired<MachineDominatorTreeWrapperPass>();
@@ -403,31 +434,6 @@ nextIfDebug(MachineBasicBlock::iterator I,
       .getNonConstIterator();
 }
 
-MachineSchedulerImpl::MachineSchedulerImpl(MachineFunction &Func,
-                                           MachineFunctionPass *P)
-    : P(P) {
-  MF = &Func;
-  MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
-  MDT = &P->getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
-  TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
-  AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
-  LIS = &P->getAnalysis<LiveIntervalsWrapperPass>().getLIS();
-}
-
-MachineSchedulerImpl::MachineSchedulerImpl(MachineFunction &Func,
-                                           MachineFunctionAnalysisManager &MFAM,
-                                           const TargetMachine *TargetM)
-    : MFAM(&MFAM) {
-  MF = &Func;
-  TM = TargetM;
-  MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
-  MDT = &MFAM.getResult<MachineDominatorTreeAnalysis>(Func);
-  auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
-                  .getManager();
-  AA = &FAM.getResult<AAManager>(Func.getFunction());
-  LIS = &MFAM.getResult<LiveIntervalsAnalysis>(Func);
-}
-
 /// Instantiate a ScheduleDAGInstrs that will be owned by the caller.
 ScheduleDAGInstrs *MachineSchedulerImpl::createMachineScheduler() {
   // Select the scheduler, or set the default.
@@ -471,27 +477,6 @@ bool MachineSchedulerImpl::run() {
   return true;
 }
 
-PostMachineSchedulerImpl::PostMachineSchedulerImpl(MachineFunction &Func,
-                                                   MachineFunctionPass *P)
-    : P(P) {
-  MF = &Func;
-  MLI = &P->getAnalysis<MachineLoopInfoWrapperPass>().getLI();
-  TM = &P->getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
-  AA = &P->getAnalysis<AAResultsWrapperPass>().getAAResults();
-}
-
-PostMachineSchedulerImpl::PostMachineSchedulerImpl(
-    MachineFunction &Func, MachineFunctionAnalysisManager &MFAM,
-    const TargetMachine *TargetM)
-    : MFAM(&MFAM) {
-  MF = &Func;
-  TM = TargetM;
-  MLI = &MFAM.getResult<MachineLoopAnalysis>(Func);
-  auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(Func)
-                  .getManager();
-  AA = &FAM.getResult<AAManager>(Func.getFunction());
-}
-
 /// Instantiate a ScheduleDAGInstrs for PostRA scheduling that will be owned by
 /// the caller. We don't have a command line option to override the postRA
 /// scheduler. The Target must configure it.