[llvm] [X86] Avoid zero extend i16 when inserting fp16 (PR #126194)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 7 00:38:20 PST 2025
https://github.com/phoebewang updated https://github.com/llvm/llvm-project/pull/126194
>From 4e16f060405232ce037137a0d655f168f1e74e8e Mon Sep 17 00:00:00 2001
From: "Wang, Phoebe" <phoebe.wang at intel.com>
Date: Fri, 7 Feb 2025 14:30:20 +0800
Subject: [PATCH 1/2] [X86] Use ANY_EXTEND when insert i8/i16 to vector
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +-
.../test/CodeGen/X86/avx512-insert-extract.ll | 2 +-
llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 6 +-
.../CodeGen/X86/canonicalize-vars-f16-type.ll | 44 +--
llvm/test/CodeGen/X86/fminimum-fmaximum.ll | 12 +-
.../CodeGen/X86/fminimumnum-fmaximumnum.ll | 274 +++++++-------
llvm/test/CodeGen/X86/fp-round.ll | 5 +-
.../CodeGen/X86/fp-strict-scalar-cmp-fp16.ll | 345 +++++++-----------
.../test/CodeGen/X86/fp-strict-scalar-fp16.ll | 148 ++++----
.../X86/fp-strict-scalar-fptoint-fp16.ll | 60 ++-
.../X86/fp-strict-scalar-round-fp16.ll | 44 +--
llvm/test/CodeGen/X86/fpclamptosat_vec.ll | 24 +-
llvm/test/CodeGen/X86/half-constrained.ll | 52 +--
llvm/test/CodeGen/X86/half-darwin.ll | 5 +-
llvm/test/CodeGen/X86/half.ll | 8 +-
llvm/test/CodeGen/X86/pr116153.ll | 4 +-
16 files changed, 458 insertions(+), 581 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 744e4e740cb2102..96b140c9805f438 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -21878,9 +21878,11 @@ SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
}
In = DAG.getBitcast(MVT::i16, In);
- In = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v8i16,
- getZeroVector(MVT::v8i16, Subtarget, DAG, DL), In,
+ In = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, In);
+ In = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v4i32,
+ getZeroVector(MVT::v4i32, Subtarget, DAG, DL), In,
DAG.getVectorIdxConstant(0, DL));
+ In = DAG.getBitcast(MVT::v8i16, In);
SDValue Res;
if (IsStrict) {
Res = DAG.getNode(X86ISD::STRICT_CVTPH2PS, DL, {MVT::v4f32, MVT::Other},
diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract.ll b/llvm/test/CodeGen/X86/avx512-insert-extract.ll
index 7ce37c637a79cad..fef29eb95b173c8 100644
--- a/llvm/test/CodeGen/X86/avx512-insert-extract.ll
+++ b/llvm/test/CodeGen/X86/avx512-insert-extract.ll
@@ -2166,7 +2166,7 @@ define void @test_concat_v2i1(ptr %arg, ptr %arg1, ptr %arg2) nounwind {
; KNL-NEXT: setb %al
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: kmovw %eax, %k0
-; KNL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; KNL-NEXT: vpsrld $16, %xmm0, %xmm0
; KNL-NEXT: vcvtph2ps %xmm0, %xmm0
; KNL-NEXT: vucomiss %xmm2, %xmm0
; KNL-NEXT: setb %al
diff --git a/llvm/test/CodeGen/X86/avx512-vec-cmp.ll b/llvm/test/CodeGen/X86/avx512-vec-cmp.ll
index 5ce2b56cbd43a00..210513fe31783ea 100644
--- a/llvm/test/CodeGen/X86/avx512-vec-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512-vec-cmp.ll
@@ -1443,8 +1443,7 @@ define void @half_vec_compare(ptr %x, ptr %y) {
; KNL: ## %bb.0: ## %entry
; KNL-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; KNL-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0x07]
-; KNL-NEXT: vpshuflw $85, %xmm0, %xmm1 ## encoding: [0xc5,0xfb,0x70,0xc8,0x55]
-; KNL-NEXT: ## xmm1 = xmm0[1,1,1,1,4,5,6,7]
+; KNL-NEXT: vpsrld $16, %xmm0, %xmm1 ## encoding: [0xc5,0xf1,0x72,0xd0,0x10]
; KNL-NEXT: vcvtph2ps %xmm1, %xmm1 ## encoding: [0xc4,0xe2,0x79,0x13,0xc9]
; KNL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; KNL-NEXT: vxorps %xmm2, %xmm2, %xmm2 ## encoding: [0xc5,0xe8,0x57,0xd2]
@@ -1470,8 +1469,7 @@ define void @half_vec_compare(ptr %x, ptr %y) {
; AVX512BW: ## %bb.0: ## %entry
; AVX512BW-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512BW-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0x07]
-; AVX512BW-NEXT: vpshuflw $85, %xmm0, %xmm1 ## encoding: [0xc5,0xfb,0x70,0xc8,0x55]
-; AVX512BW-NEXT: ## xmm1 = xmm0[1,1,1,1,4,5,6,7]
+; AVX512BW-NEXT: vpsrld $16, %xmm0, %xmm1 ## encoding: [0xc5,0xf1,0x72,0xd0,0x10]
; AVX512BW-NEXT: vcvtph2ps %xmm1, %xmm1 ## encoding: [0xc4,0xe2,0x79,0x13,0xc9]
; AVX512BW-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
; AVX512BW-NEXT: vxorps %xmm2, %xmm2, %xmm2 ## encoding: [0xc5,0xe8,0x57,0xd2]
diff --git a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
index 556b0deaf4c8306..90975e912d88593 100644
--- a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
+++ b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
@@ -43,15 +43,15 @@ define void @v_test_canonicalize__half(half addrspace(1)* %out) nounwind {
;
; AVX512-LABEL: v_test_canonicalize__half:
; AVX512: # %bb.0: # %entry
-; AVX512-NEXT: movzwl (%rdi), %eax
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx
-; AVX512-NEXT: vmovd %ecx, %xmm0
-; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmovd %eax, %xmm1
+; AVX512-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
+; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0
-; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX512-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpextrw $0, %xmm0, (%rdi)
; AVX512-NEXT: retq
@@ -144,12 +144,12 @@ define half @complex_canonicalize_fmul_half(half %a, half %b) nounwind {
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
-; AVX512-NEXT: vmovd %eax, %xmm2
+; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
+; AVX512-NEXT: vpxor %xmm3, %xmm3, %xmm3
+; AVX512-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3,4,5,6,7]
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0
-; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vsubss %xmm1, %xmm0, %xmm0
@@ -228,21 +228,21 @@ define void @v_test_canonicalize_v2half(<2 x half> addrspace(1)* %out) nounwind
; AVX512-LABEL: v_test_canonicalize_v2half:
; AVX512: # %bb.0: # %entry
; AVX512-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
-; AVX512-NEXT: vmovd %eax, %xmm1
+; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
+; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
+; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vmulss %xmm1, %xmm2, %xmm2
-; AVX512-NEXT: vxorps %xmm3, %xmm3, %xmm3
-; AVX512-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512-NEXT: vpshufb {{.*#+}} xmm3 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vmulss %xmm1, %xmm3, %xmm3
+; AVX512-NEXT: vpblendd {{.*#+}} xmm3 = xmm3[0],xmm2[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm3
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
; AVX512-NEXT: vmovd %xmm0, (%rdi)
; AVX512-NEXT: retq
entry:
diff --git a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
index 0530c843acfe678..d87a50851031780 100644
--- a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
+++ b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
@@ -1854,9 +1854,9 @@ define <4 x half> @test_fmaximum_v4f16(<4 x half> %x, <4 x half> %y) nounwind {
; AVX512-NEXT: cmovpl %ecx, %r8d
; AVX512-NEXT: movl $0, %r11d
; AVX512-NEXT: cmoval %ecx, %r11d
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm2 = xmm1[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vpsrlq $48, %xmm1, %xmm2
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vpsrlq $48, %xmm0, %xmm3
; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
; AVX512-NEXT: vucomiss %xmm2, %xmm3
; AVX512-NEXT: movl $0, %r10d
@@ -1872,9 +1872,9 @@ define <4 x half> @test_fmaximum_v4f16(<4 x half> %x, <4 x half> %y) nounwind {
; AVX512-NEXT: cmovpl %ecx, %ebx
; AVX512-NEXT: movl $0, %r14d
; AVX512-NEXT: cmoval %ecx, %r14d
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm2 = xmm1[1,1,1,1,4,5,6,7]
+; AVX512-NEXT: vpsrld $16, %xmm1, %xmm2
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm3 = xmm0[1,1,1,1,4,5,6,7]
+; AVX512-NEXT: vpsrld $16, %xmm0, %xmm3
; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
; AVX512-NEXT: vucomiss %xmm2, %xmm3
; AVX512-NEXT: movl $0, %r15d
@@ -1916,7 +1916,7 @@ define <4 x half> @test_fmaximum_v4f16(<4 x half> %x, <4 x half> %y) nounwind {
; AVX512-NEXT: vpinsrw $7, %edx, %xmm3, %xmm3
; AVX512-NEXT: vpbroadcastw {{.*#+}} xmm4 = [NaN,NaN,NaN,NaN,NaN,NaN,NaN,NaN]
; AVX512-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm3 = xmm2[1,1,1,1,4,5,6,7]
+; AVX512-NEXT: vpsrld $16, %xmm2, %xmm3
; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
; AVX512-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX512-NEXT: vucomiss %xmm4, %xmm3
@@ -1937,7 +1937,7 @@ define <4 x half> @test_fmaximum_v4f16(<4 x half> %x, <4 x half> %y) nounwind {
; AVX512-NEXT: cmovnel %eax, %edx
; AVX512-NEXT: cmovpl %eax, %edx
; AVX512-NEXT: vpinsrw $2, %edx, %xmm3, %xmm3
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm5 = xmm2[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vpsrlq $48, %xmm2, %xmm5
; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT: vucomiss %xmm4, %xmm5
; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
diff --git a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
index c7f5e13cb746474..7610579337811d8 100644
--- a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
+++ b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
@@ -1813,14 +1813,14 @@ define <4 x half> @test_fmaximumnum_v4f16(<4 x half> %x, <4 x half> %y) nounwind
; AVX512-LABEL: test_fmaximumnum_v4f16:
; AVX512: # %bb.0:
; AVX512-NEXT: subq $72, %rsp
-; AVX512-NEXT: vmovdqa %xmm1, %xmm4
-; AVX512-NEXT: vmovdqa %xmm0, %xmm8
+; AVX512-NEXT: vmovdqa %xmm1, %xmm3
+; AVX512-NEXT: vmovdqa %xmm0, %xmm6
; AVX512-NEXT: vpsrldq {{.*#+}} xmm0 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm1 = xmm8[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm1 = xmm6[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
@@ -1840,67 +1840,64 @@ define <4 x half> @test_fmaximumnum_v4f16(<4 x half> %x, <4 x half> %y) nounwind
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
-; AVX512-NEXT: vmovd %eax, %xmm1
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm9
-; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
-; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[3,3,3,3]
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vucomiss %xmm1, %xmm1
-; AVX512-NEXT: setp %al
-; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpshufd {{.*#+}} xmm2 = xmm8[3,3,3,3]
+; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
+; AVX512-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[3,3,3,3]
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT: vucomiss %xmm2, %xmm2
; AVX512-NEXT: setp %al
+; AVX512-NEXT: kmovw %eax, %k1
+; AVX512-NEXT: vpshufd {{.*#+}} xmm4 = xmm6[3,3,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512-NEXT: vucomiss %xmm4, %xmm4
+; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k2}
+; AVX512-NEXT: vmovss %xmm2, %xmm4, %xmm4 {%k2}
+; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm4
+; AVX512-NEXT: vmovaps %xmm4, (%rsp) # 16-byte Spill
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm5
+; AVX512-NEXT: vmovss %xmm5, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
-; AVX512-NEXT: vmovaps %xmm2, (%rsp) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; AVX512-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm3
-; AVX512-NEXT: vucomiss %xmm3, %xmm2
+; AVX512-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm4
+; AVX512-NEXT: vucomiss %xmm4, %xmm5
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm1 = xmm4[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vucomiss %xmm1, %xmm1
-; AVX512-NEXT: setp %al
-; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm2 = xmm8[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vmovss %xmm5, %xmm4, %xmm4 {%k1}
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm2 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT: vucomiss %xmm2, %xmm2
; AVX512-NEXT: setp %al
+; AVX512-NEXT: kmovw %eax, %k1
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm5 = xmm6[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512-NEXT: vucomiss %xmm5, %xmm5
+; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k2}
+; AVX512-NEXT: vmovss %xmm2, %xmm5, %xmm5 {%k2}
+; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm5
+; AVX512-NEXT: vmovaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm7
+; AVX512-NEXT: vmovss %xmm7, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; AVX512-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vucomiss %xmm1, %xmm2
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm5
+; AVX512-NEXT: vucomiss %xmm5, %xmm7
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1}
-; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm4[1,0]
+; AVX512-NEXT: vmovss %xmm7, %xmm5, %xmm5 {%k1}
+; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm3[1,0]
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT: vucomiss %xmm2, %xmm2
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vshufpd {{.*#+}} xmm7 = xmm8[1,0]
+; AVX512-NEXT: vshufpd {{.*#+}} xmm7 = xmm6[1,0]
; AVX512-NEXT: vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT: vucomiss %xmm7, %xmm7
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
; AVX512-NEXT: vmovss %xmm2, %xmm7, %xmm7 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm14
-; AVX512-NEXT: vcvtph2ps %xmm14, %xmm7
+; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm13
+; AVX512-NEXT: vcvtph2ps %xmm13, %xmm7
; AVX512-NEXT: vmovss %xmm7, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
@@ -1909,180 +1906,183 @@ define <4 x half> @test_fmaximumnum_v4f16(<4 x half> %x, <4 x half> %y) nounwind
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
; AVX512-NEXT: vmovss %xmm7, %xmm2, %xmm2 {%k1}
-; AVX512-NEXT: vxorps %xmm15, %xmm15, %xmm15
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm5
-; AVX512-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm0
+; AVX512-NEXT: vpxor %xmm14, %xmm14, %xmm14
+; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm14[2,3,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm15
+; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm3
-; AVX512-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm0
+; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm4
+; AVX512-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm1
-; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm5
+; AVX512-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
+; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm2
; AVX512-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX512-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm0 = xmm4[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vpsrlq $48, %xmm3, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm1 = xmm8[3,3,3,3,4,5,6,7]
+; AVX512-NEXT: vpsrlq $48, %xmm6, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm12
-; AVX512-NEXT: vcvtph2ps %xmm12, %xmm1
+; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm11
+; AVX512-NEXT: vcvtph2ps %xmm11, %xmm1
; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm13
-; AVX512-NEXT: vcvtph2ps %xmm13, %xmm6
-; AVX512-NEXT: vucomiss %xmm6, %xmm1
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm12
+; AVX512-NEXT: vcvtph2ps %xmm12, %xmm7
+; AVX512-NEXT: vucomiss %xmm7, %xmm1
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm1, %xmm6, %xmm6 {%k1}
-; AVX512-NEXT: vmovshdup {{.*#+}} xmm0 = xmm4[1,1,3,3]
+; AVX512-NEXT: vmovss %xmm1, %xmm7, %xmm7 {%k1}
+; AVX512-NEXT: vmovshdup {{.*#+}} xmm0 = xmm3[1,1,3,3]
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm8[1,1,3,3]
+; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm6[1,1,3,3]
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm10
-; AVX512-NEXT: vcvtph2ps %xmm10, %xmm3
-; AVX512-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm11
-; AVX512-NEXT: vcvtph2ps %xmm11, %xmm5
-; AVX512-NEXT: vucomiss %xmm5, %xmm3
+; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm9
+; AVX512-NEXT: vcvtph2ps %xmm9, %xmm4
+; AVX512-NEXT: vmovss %xmm4, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm10
+; AVX512-NEXT: vcvtph2ps %xmm10, %xmm5
+; AVX512-NEXT: vucomiss %xmm5, %xmm4
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm3, %xmm5, %xmm5 {%k1}
-; AVX512-NEXT: vcvtph2ps %xmm4, %xmm0
+; AVX512-NEXT: vmovss %xmm4, %xmm5, %xmm5 {%k1}
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vcvtph2ps %xmm8, %xmm3
-; AVX512-NEXT: vucomiss %xmm3, %xmm3
+; AVX512-NEXT: vcvtph2ps %xmm6, %xmm4
+; AVX512-NEXT: vucomiss %xmm4, %xmm4
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm0, %xmm3, %xmm3 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm3
-; AVX512-NEXT: vcvtph2ps %xmm3, %xmm1
+; AVX512-NEXT: vmovss %xmm0, %xmm4, %xmm4 {%k2}
+; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm4
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm1
; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm7
-; AVX512-NEXT: vcvtph2ps %xmm7, %xmm2
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm8
+; AVX512-NEXT: vcvtph2ps %xmm8, %xmm2
; AVX512-NEXT: vucomiss %xmm2, %xmm1
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm1 = xmm4[1,1,1,1,4,5,6,7]
+; AVX512-NEXT: vpsrld $16, %xmm3, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpshuflw {{.*#+}} xmm4 = xmm8[1,1,1,1,4,5,6,7]
-; AVX512-NEXT: vcvtph2ps %xmm4, %xmm4
-; AVX512-NEXT: vucomiss %xmm4, %xmm4
+; AVX512-NEXT: vpsrld $16, %xmm6, %xmm3
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vucomiss %xmm3, %xmm3
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm1, %xmm4, %xmm4 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm8
-; AVX512-NEXT: vcvtph2ps %xmm8, %xmm4
-; AVX512-NEXT: vmovss %xmm4, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k2}
+; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm6
+; AVX512-NEXT: vcvtph2ps %xmm6, %xmm3
+; AVX512-NEXT: vmovss %xmm3, %xmm1, %xmm1 {%k1}
; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm0
-; AVX512-NEXT: vucomiss %xmm0, %xmm4
+; AVX512-NEXT: vucomiss %xmm0, %xmm3
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm4, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm6, %xmm4
-; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero
-; AVX512-NEXT: vcvtph2ps %xmm4, %xmm4
-; AVX512-NEXT: vmulss %xmm4, %xmm9, %xmm4
+; AVX512-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm3
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vmulss %xmm3, %xmm15, %xmm3
; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm5
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
-; AVX512-NEXT: vmulss %xmm5, %xmm9, %xmm5
+; AVX512-NEXT: vmulss %xmm5, %xmm15, %xmm5
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vmulss %xmm2, %xmm9, %xmm2
+; AVX512-NEXT: vmulss %xmm2, %xmm15, %xmm2
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm4 = xmm4[0],xmm15[1,2,3]
-; AVX512-NEXT: vblendps {{.*#+}} xmm5 = xmm5[0],xmm15[1,2,3]
-; AVX512-NEXT: vblendps {{.*#+}} xmm9 = xmm2[0],xmm15[1,2,3]
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm2
-; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm6
-; AVX512-NEXT: vcvtps2ph $4, %xmm9, %xmm4
+; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
+; AVX512-NEXT: vpblendd {{.*#+}} xmm3 = xmm3[0],xmm14[1,2,3]
+; AVX512-NEXT: vpblendd {{.*#+}} xmm5 = xmm5[0],xmm14[1,2,3]
+; AVX512-NEXT: vpblendd {{.*#+}} xmm7 = xmm2[0],xmm14[1,2,3]
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm2
+; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm14
+; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm3
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm5
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm9[0],xmm0[0],xmm9[1],xmm0[1]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm14[0],xmm2[0],xmm14[1],xmm2[1],xmm14[2],xmm2[2],xmm14[3],xmm2[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm7[0],xmm0[0],xmm7[1],xmm0[1]
; AVX512-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX512-NEXT: # xmm0 = xmm0[0],mem[0]
-; AVX512-NEXT: vmovdqa (%rsp), %xmm9 # 16-byte Reload
-; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm9, %xmm9 # 16-byte Folded Reload
-; AVX512-NEXT: # xmm9 = xmm9[0],mem[0],xmm9[1],mem[1],xmm9[2],mem[2],xmm9[3],mem[3]
-; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm14, %xmm14 # 16-byte Folded Reload
-; AVX512-NEXT: # xmm14 = xmm14[0],mem[0],xmm14[1],mem[1],xmm14[2],mem[2],xmm14[3],mem[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm14[0],xmm9[0],xmm14[1],xmm9[1]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm3[0],xmm8[0],xmm3[1],xmm8[1],xmm3[2],xmm8[2],xmm3[3],xmm8[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm10[0],xmm3[1],xmm10[1]
-; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm9[0]
-; AVX512-NEXT: vpxor %xmm8, %xmm8, %xmm8
-; AVX512-NEXT: vpcmpeqw %xmm3, %xmm8, %xmm9
-; AVX512-NEXT: vpblendvb %xmm9, %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vmovdqa (%rsp), %xmm7 # 16-byte Reload
+; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm7, %xmm7 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm7 = xmm7[0],mem[0],xmm7[1],mem[1],xmm7[2],mem[2],xmm7[3],mem[3]
+; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm13, %xmm13 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm13 = xmm13[0],mem[0],xmm13[1],mem[1],xmm13[2],mem[2],xmm13[3],mem[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm13[0],xmm7[0],xmm13[1],xmm7[1]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm9[0],xmm11[0],xmm9[1],xmm11[1],xmm9[2],xmm11[2],xmm9[3],xmm11[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm4[0],xmm9[0],xmm4[1],xmm9[1]
+; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm7[0]
+; AVX512-NEXT: vpxor %xmm6, %xmm6, %xmm6
+; AVX512-NEXT: vpcmpeqw %xmm6, %xmm4, %xmm7
+; AVX512-NEXT: vpblendvb %xmm7, %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
+; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm7, %xmm7 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm7 = xmm7[0],mem[0],xmm7[1],mem[1],xmm7[2],mem[2],xmm7[3],mem[3]
; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Reload
; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm9, %xmm9 # 16-byte Folded Reload
; AVX512-NEXT: # xmm9 = xmm9[0],mem[0],xmm9[1],mem[1],xmm9[2],mem[2],xmm9[3],mem[3]
-; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Reload
-; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm10, %xmm10 # 16-byte Folded Reload
-; AVX512-NEXT: # xmm10 = xmm10[0],mem[0],xmm10[1],mem[1],xmm10[2],mem[2],xmm10[3],mem[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm11[0],xmm13[0],xmm11[1],xmm13[1],xmm11[2],xmm13[2],xmm11[3],xmm13[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm7[0],xmm1[0],xmm7[1],xmm1[1],xmm7[2],xmm1[2],xmm7[3],xmm1[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm10[0],xmm1[1],xmm10[1]
-; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm9[0]
-; AVX512-NEXT: vpcmpeqw %xmm1, %xmm8, %xmm7
-; AVX512-NEXT: vpblendvb %xmm7, %xmm1, %xmm3, %xmm1
-; AVX512-NEXT: vcvtph2ps %xmm5, %xmm3
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm9[0],xmm7[0],xmm9[1],xmm7[1]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm8[0],xmm1[0],xmm8[1],xmm1[1],xmm8[2],xmm1[2],xmm8[3],xmm1[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm9[0],xmm1[1],xmm9[1]
+; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm7[0]
+; AVX512-NEXT: vpcmpeqw %xmm6, %xmm1, %xmm6
+; AVX512-NEXT: vpblendvb %xmm6, %xmm1, %xmm4, %xmm1
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm4
; AVX512-NEXT: xorl %eax, %eax
; AVX512-NEXT: vpxor %xmm5, %xmm5, %xmm5
-; AVX512-NEXT: vucomiss %xmm5, %xmm3
+; AVX512-NEXT: vucomiss %xmm5, %xmm4
; AVX512-NEXT: movl $65535, %ecx # imm = 0xFFFF
; AVX512-NEXT: movl $0, %edx
; AVX512-NEXT: cmovel %ecx, %edx
-; AVX512-NEXT: vcvtph2ps %xmm4, %xmm3
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
; AVX512-NEXT: vucomiss %xmm5, %xmm3
; AVX512-NEXT: movl $0, %esi
; AVX512-NEXT: cmovel %ecx, %esi
-; AVX512-NEXT: vcvtph2ps %xmm6, %xmm3
+; AVX512-NEXT: vcvtph2ps %xmm14, %xmm3
; AVX512-NEXT: vucomiss %xmm5, %xmm3
; AVX512-NEXT: movl $0, %edi
; AVX512-NEXT: cmovel %ecx, %edi
diff --git a/llvm/test/CodeGen/X86/fp-round.ll b/llvm/test/CodeGen/X86/fp-round.ll
index 58c4f71892e902e..f7d68190f852c95 100644
--- a/llvm/test/CodeGen/X86/fp-round.ll
+++ b/llvm/test/CodeGen/X86/fp-round.ll
@@ -50,9 +50,8 @@ define half @round_f16(half %h) {
;
; AVX512F-LABEL: round_f16:
; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vpextrw $0, %xmm0, %eax
-; AVX512F-NEXT: movzwl %ax, %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX512F-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4.9999997E-1,4.9999997E-1,4.9999997E-1,4.9999997E-1]
; AVX512F-NEXT: vpternlogd {{.*#+}} xmm1 = xmm1 | (xmm0 & mem)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
index 6a6b86e8efa7c33..6dda71b0bef9ca6 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
@@ -32,15 +32,12 @@ define i32 @test_f16_oeq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oeq_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
@@ -96,15 +93,12 @@ define i32 @test_f16_ogt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ogt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovbel %esi, %eax
; AVX-NEXT: retq
;
@@ -157,15 +151,12 @@ define i32 @test_f16_oge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oge_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovbl %esi, %eax
; AVX-NEXT: retq
;
@@ -220,13 +211,10 @@ define i32 @test_f16_olt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_olt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
@@ -283,13 +271,10 @@ define i32 @test_f16_ole_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ole_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
@@ -344,15 +329,12 @@ define i32 @test_f16_one_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_one_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovel %esi, %eax
; AVX-NEXT: retq
;
@@ -405,15 +387,12 @@ define i32 @test_f16_ord_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ord_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
;
@@ -466,15 +445,12 @@ define i32 @test_f16_ueq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ueq_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: retq
;
@@ -529,13 +505,10 @@ define i32 @test_f16_ugt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ugt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
@@ -592,13 +565,10 @@ define i32 @test_f16_uge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uge_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
@@ -653,15 +623,12 @@ define i32 @test_f16_ult_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ult_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovael %esi, %eax
; AVX-NEXT: retq
;
@@ -714,15 +681,12 @@ define i32 @test_f16_ule_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ule_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmoval %esi, %eax
; AVX-NEXT: retq
;
@@ -776,15 +740,12 @@ define i32 @test_f16_une_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_une_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %edi, %eax
; AVX-NEXT: cmovpl %edi, %eax
; AVX-NEXT: retq
@@ -840,15 +801,12 @@ define i32 @test_f16_uno_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uno_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: cmovnpl %esi, %eax
; AVX-NEXT: retq
;
@@ -902,15 +860,12 @@ define i32 @test_f16_oeq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oeq_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
@@ -966,15 +921,12 @@ define i32 @test_f16_ogt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ogt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovbel %esi, %eax
; AVX-NEXT: retq
;
@@ -1027,15 +979,12 @@ define i32 @test_f16_oge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oge_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovbl %esi, %eax
; AVX-NEXT: retq
;
@@ -1090,13 +1039,10 @@ define i32 @test_f16_olt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_olt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
@@ -1153,13 +1099,10 @@ define i32 @test_f16_ole_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ole_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
@@ -1214,15 +1157,12 @@ define i32 @test_f16_one_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_one_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovel %esi, %eax
; AVX-NEXT: retq
;
@@ -1275,15 +1215,12 @@ define i32 @test_f16_ord_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ord_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
;
@@ -1336,15 +1273,12 @@ define i32 @test_f16_ueq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ueq_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: retq
;
@@ -1399,13 +1333,10 @@ define i32 @test_f16_ugt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ugt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
@@ -1462,13 +1393,10 @@ define i32 @test_f16_uge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uge_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: vpextrw $0, %xmm0, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
@@ -1523,15 +1451,12 @@ define i32 @test_f16_ult_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ult_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovael %esi, %eax
; AVX-NEXT: retq
;
@@ -1584,15 +1509,12 @@ define i32 @test_f16_ule_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ule_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmoval %esi, %eax
; AVX-NEXT: retq
;
@@ -1646,15 +1568,12 @@ define i32 @test_f16_une_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_une_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnel %edi, %eax
; AVX-NEXT: cmovpl %edi, %eax
; AVX-NEXT: retq
@@ -1710,15 +1629,12 @@ define i32 @test_f16_uno_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uno_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX-NEXT: vpextrw $0, %xmm1, %edx
-; AVX-NEXT: movzwl %dx, %edx
-; AVX-NEXT: vmovd %edx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vcomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vcomiss %xmm1, %xmm0
; AVX-NEXT: cmovnpl %esi, %eax
; AVX-NEXT: retq
;
@@ -1767,15 +1683,12 @@ define void @foo(half %0, half %1) #0 {
;
; AVX-LABEL: foo:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vucomiss %xmm0, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vucomiss %xmm1, %xmm0
; AVX-NEXT: ja bar at PLT # TAILCALL
; AVX-NEXT: # %bb.1:
; AVX-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
index fbc798d8bbe48c8..c0022a2846f4a43 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
@@ -34,17 +34,13 @@ define half @fadd_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fadd_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -82,17 +78,13 @@ define half @fsub_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fsub_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vsubss %xmm0, %xmm1, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vsubss %xmm1, %xmm0, %xmm0
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -130,17 +122,13 @@ define half @fmul_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fmul_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -178,17 +166,13 @@ define half @fdiv_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fdiv_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: vpextrw $0, %xmm1, %ecx
-; AVX-NEXT: movzwl %cx, %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -221,8 +205,9 @@ define void @fpext_f16_to_f32(ptr %val, ptr %ret) nounwind strictfp {
;
; AVX-LABEL: fpext_f16_to_f32:
; AVX: # %bb.0:
-; AVX-NEXT: movzwl (%rdi), %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vmovss %xmm0, (%rsi)
; AVX-NEXT: retq
@@ -263,8 +248,9 @@ define void @fpext_f16_to_f64(ptr %val, ptr %ret) nounwind strictfp {
;
; AVX-LABEL: fpext_f16_to_f64:
; AVX: # %bb.0:
-; AVX-NEXT: movzwl (%rdi), %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovsd %xmm0, (%rsi)
@@ -393,17 +379,29 @@ define void @fsqrt_f16(ptr %a) nounwind strictfp {
; SSE2-NEXT: popq %rbx
; SSE2-NEXT: retq
;
-; AVX-LABEL: fsqrt_f16:
-; AVX: # %bb.0:
-; AVX-NEXT: movzwl (%rdi), %eax
-; AVX-NEXT: vmovd %eax, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; AVX-NEXT: vpextrw $0, %xmm0, (%rdi)
-; AVX-NEXT: retq
+; F16C-LABEL: fsqrt_f16:
+; F16C: # %bb.0:
+; F16C-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
+; F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: vpextrw $0, %xmm0, (%rdi)
+; F16C-NEXT: retq
+;
+; AVX512-LABEL: fsqrt_f16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512-NEXT: vpextrw $0, %xmm0, (%rdi)
+; AVX512-NEXT: retq
;
; X86-LABEL: fsqrt_f16:
; X86: # %bb.0:
@@ -455,42 +453,30 @@ define half @fma_f16(half %a, half %b, half %c) nounwind strictfp {
; F16C-LABEL: fma_f16:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
-; F16C-NEXT: vpextrw $0, %xmm0, %eax
-; F16C-NEXT: vpextrw $0, %xmm1, %ecx
-; F16C-NEXT: vpextrw $0, %xmm2, %edx
-; F16C-NEXT: movzwl %dx, %edx
-; F16C-NEXT: vmovd %edx, %xmm0
-; F16C-NEXT: vcvtph2ps %xmm0, %xmm2
-; F16C-NEXT: movzwl %cx, %ecx
-; F16C-NEXT: vmovd %ecx, %xmm0
-; F16C-NEXT: vcvtph2ps %xmm0, %xmm1
-; F16C-NEXT: movzwl %ax, %eax
-; F16C-NEXT: vmovd %eax, %xmm0
+; F16C-NEXT: vxorps %xmm3, %xmm3, %xmm3
+; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
+; F16C-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3]
+; F16C-NEXT: vcvtph2ps %xmm1, %xmm1
+; F16C-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
+; F16C-NEXT: vcvtph2ps %xmm2, %xmm2
; F16C-NEXT: callq fmaf at PLT
-; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],mem[1,2,3]
; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
; AVX512-LABEL: fma_f16:
; AVX512: # %bb.0:
-; AVX512-NEXT: vpextrw $0, %xmm1, %eax
-; AVX512-NEXT: vpextrw $0, %xmm0, %ecx
-; AVX512-NEXT: vpextrw $0, %xmm2, %edx
-; AVX512-NEXT: movzwl %dx, %edx
-; AVX512-NEXT: vmovd %edx, %xmm0
+; AVX512-NEXT: vxorps %xmm3, %xmm3, %xmm3
+; AVX512-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: movzwl %cx, %ecx
-; AVX512-NEXT: vmovd %ecx, %xmm1
+; AVX512-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3]
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: movzwl %ax, %eax
-; AVX512-NEXT: vmovd %eax, %xmm2
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm1 * xmm2) + xmm0
-; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
+; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm1 = (xmm0 * xmm1) + xmm2
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm3[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
index 0498f9b7f9a3d0e..85b43e28e7b14eb 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
@@ -28,9 +28,8 @@ define i1 @fptosi_f16toi1(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi1:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -64,9 +63,8 @@ define i8 @fptosi_f16toi8(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi8:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -100,9 +98,8 @@ define i16 @fptosi_f16toi16(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax
@@ -135,9 +132,8 @@ define i32 @fptosi_f16toi32(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: retq
@@ -167,9 +163,8 @@ define i64 @fptosi_f16toi64(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi64:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %rax
; AVX-NEXT: retq
@@ -203,9 +198,8 @@ define i1 @fptoui_f16toi1(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi1:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -239,9 +233,8 @@ define i8 @fptoui_f16toi8(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi8:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -275,9 +268,8 @@ define i16 @fptoui_f16toi16(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax
@@ -311,9 +303,8 @@ define i32 @fptoui_f16toi32(half %x) #0 {
;
; F16C-LABEL: fptoui_f16toi32:
; F16C: # %bb.0:
-; F16C-NEXT: vpextrw $0, %xmm0, %eax
-; F16C-NEXT: movzwl %ax, %eax
-; F16C-NEXT: vmovd %eax, %xmm0
+; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; F16C-NEXT: vcvttss2si %xmm0, %rax
; F16C-NEXT: # kill: def $eax killed $eax killed $rax
@@ -321,9 +312,8 @@ define i32 @fptoui_f16toi32(half %x) #0 {
;
; AVX512-LABEL: fptoui_f16toi32:
; AVX512: # %bb.0:
-; AVX512-NEXT: vpextrw $0, %xmm0, %eax
-; AVX512-NEXT: movzwl %ax, %eax
-; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vcvttss2usi %xmm0, %eax
; AVX512-NEXT: retq
@@ -365,9 +355,8 @@ define i64 @fptoui_f16toi64(half %x) #0 {
;
; F16C-LABEL: fptoui_f16toi64:
; F16C: # %bb.0:
-; F16C-NEXT: vpextrw $0, %xmm0, %eax
-; F16C-NEXT: movzwl %ax, %eax
-; F16C-NEXT: vmovd %eax, %xmm0
+; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; F16C-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]
; F16C-NEXT: vcomiss %xmm1, %xmm0
@@ -386,9 +375,8 @@ define i64 @fptoui_f16toi64(half %x) #0 {
;
; AVX512-LABEL: fptoui_f16toi64:
; AVX512: # %bb.0:
-; AVX512-NEXT: vpextrw $0, %xmm0, %eax
-; AVX512-NEXT: movzwl %ax, %eax
-; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vcvttss2usi %xmm0, %rax
; AVX512-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
index 1ab97dafb851475..6d3907261b60a08 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
@@ -25,12 +25,10 @@ define half @fceil32(half %f) #0 {
;
; AVX-LABEL: fceil32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -61,12 +59,10 @@ define half @ffloor32(half %f) #0 {
;
; AVX-LABEL: ffloor32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -97,12 +93,10 @@ define half @ftrunc32(half %f) #0 {
;
; AVX-LABEL: ftrunc32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -133,12 +127,10 @@ define half @frint32(half %f) #0 {
;
; AVX-LABEL: frint32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -170,12 +162,10 @@ define half @fnearbyint32(half %f) #0 {
;
; AVX-LABEL: fnearbyint32:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -207,12 +197,10 @@ define half @froundeven16(half %f) #0 {
;
; AVX-LABEL: froundeven16:
; AVX: # %bb.0:
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -245,13 +233,11 @@ define half @fround16(half %f) #0 {
; AVX-LABEL: fround16:
; AVX: # %bb.0:
; AVX-NEXT: pushq %rax
-; AVX-NEXT: vpextrw $0, %xmm0, %eax
-; AVX-NEXT: movzwl %ax, %eax
-; AVX-NEXT: vmovd %eax, %xmm0
-; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: callq roundf at PLT
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: callq roundf at PLT
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],mem[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: popq %rax
; AVX-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/fpclamptosat_vec.ll b/llvm/test/CodeGen/X86/fpclamptosat_vec.ll
index 2dedb10d42fb4d2..4ac829c0dfd53da 100644
--- a/llvm/test/CodeGen/X86/fpclamptosat_vec.ll
+++ b/llvm/test/CodeGen/X86/fpclamptosat_vec.ll
@@ -698,7 +698,7 @@ define <4 x i32> @stest_f16i32(<4 x half> %x) nounwind {
;
; AVX2-LABEL: stest_f16i32:
; AVX2: # %bb.0: # %entry
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[3,3,3,3,4,5,6,7]
+; AVX2-NEXT: vpsrlq $48, %xmm0, %xmm1
; AVX2-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX2-NEXT: vcvttss2si %xmm1, %rax
; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
@@ -709,7 +709,7 @@ define <4 x i32> @stest_f16i32(<4 x half> %x) nounwind {
; AVX2-NEXT: vcvttss2si %xmm1, %rax
; AVX2-NEXT: vmovq %rcx, %xmm1
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX2-NEXT: vmovq %rax, %xmm2
; AVX2-NEXT: vcvttss2si %xmm0, %rax
@@ -836,7 +836,7 @@ define <4 x i32> @utesth_f16i32(<4 x half> %x) nounwind {
;
; AVX2-LABEL: utesth_f16i32:
; AVX2: # %bb.0: # %entry
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[3,3,3,3,4,5,6,7]
+; AVX2-NEXT: vpsrlq $48, %xmm0, %xmm1
; AVX2-NEXT: vcvtph2ps %xmm1, %xmm2
; AVX2-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]
; AVX2-NEXT: vsubss %xmm1, %xmm2, %xmm3
@@ -866,7 +866,7 @@ define <4 x i32> @utesth_f16i32(<4 x half> %x) nounwind {
; AVX2-NEXT: sarq $63, %rdx
; AVX2-NEXT: andq %rax, %rdx
; AVX2-NEXT: orq %rcx, %rdx
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX2-NEXT: vsubss %xmm1, %xmm0, %xmm1
; AVX2-NEXT: vcvttss2si %xmm1, %rax
@@ -999,7 +999,7 @@ define <4 x i32> @ustest_f16i32(<4 x half> %x) nounwind {
;
; AVX2-LABEL: ustest_f16i32:
; AVX2: # %bb.0: # %entry
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[3,3,3,3,4,5,6,7]
+; AVX2-NEXT: vpsrlq $48, %xmm0, %xmm1
; AVX2-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX2-NEXT: vcvttss2si %xmm1, %rax
; AVX2-NEXT: vmovq %rax, %xmm1
@@ -1011,7 +1011,7 @@ define <4 x i32> @ustest_f16i32(<4 x half> %x) nounwind {
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm2
; AVX2-NEXT: vcvttss2si %xmm2, %rax
; AVX2-NEXT: vmovq %rax, %xmm2
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX2-NEXT: vcvttss2si %xmm0, %rax
; AVX2-NEXT: vmovq %rax, %xmm0
@@ -3310,7 +3310,7 @@ define <4 x i32> @stest_f16i32_mm(<4 x half> %x) nounwind {
;
; AVX2-LABEL: stest_f16i32_mm:
; AVX2: # %bb.0: # %entry
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[3,3,3,3,4,5,6,7]
+; AVX2-NEXT: vpsrlq $48, %xmm0, %xmm1
; AVX2-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX2-NEXT: vcvttss2si %xmm1, %rax
; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
@@ -3321,7 +3321,7 @@ define <4 x i32> @stest_f16i32_mm(<4 x half> %x) nounwind {
; AVX2-NEXT: vcvttss2si %xmm1, %rax
; AVX2-NEXT: vmovq %rcx, %xmm1
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX2-NEXT: vmovq %rax, %xmm2
; AVX2-NEXT: vcvttss2si %xmm0, %rax
@@ -3446,7 +3446,7 @@ define <4 x i32> @utesth_f16i32_mm(<4 x half> %x) nounwind {
;
; AVX2-LABEL: utesth_f16i32_mm:
; AVX2: # %bb.0: # %entry
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[3,3,3,3,4,5,6,7]
+; AVX2-NEXT: vpsrlq $48, %xmm0, %xmm1
; AVX2-NEXT: vcvtph2ps %xmm1, %xmm2
; AVX2-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]
; AVX2-NEXT: vsubss %xmm1, %xmm2, %xmm3
@@ -3476,7 +3476,7 @@ define <4 x i32> @utesth_f16i32_mm(<4 x half> %x) nounwind {
; AVX2-NEXT: sarq $63, %rdx
; AVX2-NEXT: andq %rax, %rdx
; AVX2-NEXT: orq %rcx, %rdx
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX2-NEXT: vsubss %xmm1, %xmm0, %xmm1
; AVX2-NEXT: vcvttss2si %xmm1, %rax
@@ -3608,7 +3608,7 @@ define <4 x i32> @ustest_f16i32_mm(<4 x half> %x) nounwind {
;
; AVX2-LABEL: ustest_f16i32_mm:
; AVX2: # %bb.0: # %entry
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[3,3,3,3,4,5,6,7]
+; AVX2-NEXT: vpsrlq $48, %xmm0, %xmm1
; AVX2-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX2-NEXT: vcvttss2si %xmm1, %rax
; AVX2-NEXT: vmovq %rax, %xmm1
@@ -3620,7 +3620,7 @@ define <4 x i32> @ustest_f16i32_mm(<4 x half> %x) nounwind {
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm2
; AVX2-NEXT: vcvttss2si %xmm2, %rax
; AVX2-NEXT: vmovq %rax, %xmm2
-; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX2-NEXT: vcvttss2si %xmm0, %rax
; AVX2-NEXT: vmovq %rax, %xmm0
diff --git a/llvm/test/CodeGen/X86/half-constrained.ll b/llvm/test/CodeGen/X86/half-constrained.ll
index 0f73129d984bd91..8840d23716e8800 100644
--- a/llvm/test/CodeGen/X86/half-constrained.ll
+++ b/llvm/test/CodeGen/X86/half-constrained.ll
@@ -24,8 +24,9 @@ define float @half_to_float() strictfp {
; X86-F16C: # %bb.0:
; X86-F16C-NEXT: pushl %eax
; X86-F16C-NEXT: .cfi_def_cfa_offset 8
-; X86-F16C-NEXT: movzwl a, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm0
+; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
+; X86-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X86-F16C-NEXT: vmovss %xmm0, (%esp)
; X86-F16C-NEXT: flds (%esp)
@@ -48,8 +49,9 @@ define float @half_to_float() strictfp {
; X64-F16C-LABEL: half_to_float:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm0
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
+; X64-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: retq
%1 = load half, ptr @a, align 2
@@ -73,8 +75,9 @@ define double @half_to_double() strictfp {
; X86-F16C: # %bb.0:
; X86-F16C-NEXT: subl $12, %esp
; X86-F16C-NEXT: .cfi_def_cfa_offset 16
-; X86-F16C-NEXT: movzwl a, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm0
+; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
+; X86-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X86-F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; X86-F16C-NEXT: vmovsd %xmm0, (%esp)
@@ -99,8 +102,9 @@ define double @half_to_double() strictfp {
; X64-F16C-LABEL: half_to_double:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm0
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
+; X64-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; X64-F16C-NEXT: retq
@@ -342,15 +346,15 @@ define void @add() strictfp {
;
; X86-F16C-LABEL: add:
; X86-F16C: # %bb.0:
-; X86-F16C-NEXT: movzwl a, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm0
+; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
+; X86-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
-; X86-F16C-NEXT: movzwl b, %eax
-; X86-F16C-NEXT: vmovd %eax, %xmm1
-; X86-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
-; X86-F16C-NEXT: vaddss %xmm1, %xmm0, %xmm0
-; X86-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; X86-F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; X86-F16C-NEXT: vpinsrw $0, b, %xmm0, %xmm2
+; X86-F16C-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3,4,5,6,7]
+; X86-F16C-NEXT: vcvtph2ps %xmm2, %xmm2
+; X86-F16C-NEXT: vaddss %xmm2, %xmm0, %xmm0
+; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X86-F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; X86-F16C-NEXT: vpextrw $0, %xmm0, c
; X86-F16C-NEXT: retl
@@ -378,16 +382,16 @@ define void @add() strictfp {
; X64-F16C-LABEL: add:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm0
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
+; X64-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: movq b at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: movzwl (%rax), %eax
-; X64-F16C-NEXT: vmovd %eax, %xmm1
-; X64-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
-; X64-F16C-NEXT: vaddss %xmm1, %xmm0, %xmm0
-; X64-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; X64-F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm2
+; X64-F16C-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3,4,5,6,7]
+; X64-F16C-NEXT: vcvtph2ps %xmm2, %xmm2
+; X64-F16C-NEXT: vaddss %xmm2, %xmm0, %xmm0
+; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; X64-F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; X64-F16C-NEXT: movq c at GOTPCREL(%rip), %rax
; X64-F16C-NEXT: vpextrw $0, %xmm0, (%rax)
diff --git a/llvm/test/CodeGen/X86/half-darwin.ll b/llvm/test/CodeGen/X86/half-darwin.ll
index 3cbf5c11235ea83..478fa4f0ed7def4 100644
--- a/llvm/test/CodeGen/X86/half-darwin.ll
+++ b/llvm/test/CodeGen/X86/half-darwin.ll
@@ -165,8 +165,9 @@ define float @strict_extendhfsf(ptr %ptr) nounwind strictfp {
;
; CHECK-F16C-LABEL: strict_extendhfsf:
; CHECK-F16C: ## %bb.0:
-; CHECK-F16C-NEXT: movzwl (%rdi), %eax
-; CHECK-F16C-NEXT: vmovd %eax, %xmm0
+; CHECK-F16C-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
+; CHECK-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; CHECK-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
; CHECK-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; CHECK-F16C-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/half.ll b/llvm/test/CodeGen/X86/half.ll
index 2472e6e19c862b5..b0fbfcb7f0bfe98 100644
--- a/llvm/test/CodeGen/X86/half.ll
+++ b/llvm/test/CodeGen/X86/half.ll
@@ -1602,9 +1602,9 @@ define <8 x half> @maxnum_v8f16(<8 x half> %0, <8 x half> %1) #0 {
; BWON-F16C-NEXT: # %bb.7:
; BWON-F16C-NEXT: vmovaps %xmm5, %xmm6
; BWON-F16C-NEXT: .LBB26_8:
-; BWON-F16C-NEXT: vpshuflw {{.*#+}} xmm5 = xmm1[3,3,3,3,4,5,6,7]
+; BWON-F16C-NEXT: vpsrlq $48, %xmm1, %xmm5
; BWON-F16C-NEXT: vcvtph2ps %xmm5, %xmm7
-; BWON-F16C-NEXT: vpshuflw {{.*#+}} xmm5 = xmm0[3,3,3,3,4,5,6,7]
+; BWON-F16C-NEXT: vpsrlq $48, %xmm0, %xmm5
; BWON-F16C-NEXT: vcvtph2ps %xmm5, %xmm5
; BWON-F16C-NEXT: vucomiss %xmm7, %xmm5
; BWON-F16C-NEXT: ja .LBB26_10
@@ -1638,9 +1638,9 @@ define <8 x half> @maxnum_v8f16(<8 x half> %0, <8 x half> %1) #0 {
; BWON-F16C-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; BWON-F16C-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; BWON-F16C-NEXT: vcvtps2ph $4, %xmm6, %xmm4
-; BWON-F16C-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[1,1,1,1,4,5,6,7]
+; BWON-F16C-NEXT: vpsrld $16, %xmm1, %xmm1
; BWON-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
-; BWON-F16C-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,1,1,1,4,5,6,7]
+; BWON-F16C-NEXT: vpsrld $16, %xmm0, %xmm0
; BWON-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; BWON-F16C-NEXT: vucomiss %xmm1, %xmm0
; BWON-F16C-NEXT: ja .LBB26_16
diff --git a/llvm/test/CodeGen/X86/pr116153.ll b/llvm/test/CodeGen/X86/pr116153.ll
index 5c9c2c76131d5a5..b4e62a6ec20db3d 100644
--- a/llvm/test/CodeGen/X86/pr116153.ll
+++ b/llvm/test/CodeGen/X86/pr116153.ll
@@ -4,7 +4,7 @@
define void @_test_func(<16 x half> %0) #0 {
; CHECK-LABEL: _test_func:
; CHECK: # %bb.0:
-; CHECK-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[3,3,3,3,4,5,6,7]
+; CHECK-NEXT: vpsrlq $48, %xmm0, %xmm1
; CHECK-NEXT: vcvtph2ps %xmm1, %xmm1
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: vucomiss %xmm1, %xmm1
@@ -16,7 +16,7 @@ define void @_test_func(<16 x half> %0) #0 {
; CHECK-NEXT: vucomiss %xmm1, %xmm1
; CHECK-NEXT: movl $0, %esi
; CHECK-NEXT: cmovnpl %ecx, %esi
-; CHECK-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[1,1,1,1,4,5,6,7]
+; CHECK-NEXT: vpsrld $16, %xmm0, %xmm1
; CHECK-NEXT: vcvtph2ps %xmm1, %xmm1
; CHECK-NEXT: vucomiss %xmm1, %xmm1
; CHECK-NEXT: movl $0, %edi
>From 9dff432d6c0fe9616952c1119cb6db521fb92a48 Mon Sep 17 00:00:00 2001
From: "Wang, Phoebe" <phoebe.wang at intel.com>
Date: Fri, 7 Feb 2025 16:38:02 +0800
Subject: [PATCH 2/2] Limit to non-strict case only
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 13 +-
.../CodeGen/X86/canonicalize-vars-f16-type.ll | 44 +--
llvm/test/CodeGen/X86/fminimum-fmaximum.ll | 4 +-
.../CodeGen/X86/fminimumnum-fmaximumnum.ll | 274 +++++++-------
llvm/test/CodeGen/X86/fp-round.ll | 2 -
.../CodeGen/X86/fp-strict-scalar-cmp-fp16.ll | 345 +++++++++++-------
.../test/CodeGen/X86/fp-strict-scalar-fp16.ll | 148 ++++----
.../X86/fp-strict-scalar-fptoint-fp16.ll | 60 +--
.../X86/fp-strict-scalar-round-fp16.ll | 44 ++-
llvm/test/CodeGen/X86/half-constrained.ll | 52 ++-
llvm/test/CodeGen/X86/half-darwin.ll | 5 +-
llvm/test/CodeGen/X86/pr91005.ll | 3 +-
12 files changed, 559 insertions(+), 435 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 96b140c9805f438..7a3233847f37db7 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -21878,17 +21878,20 @@ SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
}
In = DAG.getBitcast(MVT::i16, In);
- In = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, In);
- In = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v4i32,
- getZeroVector(MVT::v4i32, Subtarget, DAG, DL), In,
- DAG.getVectorIdxConstant(0, DL));
- In = DAG.getBitcast(MVT::v8i16, In);
SDValue Res;
if (IsStrict) {
+ In = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v8i16,
+ getZeroVector(MVT::v8i16, Subtarget, DAG, DL), In,
+ DAG.getVectorIdxConstant(0, DL));
Res = DAG.getNode(X86ISD::STRICT_CVTPH2PS, DL, {MVT::v4f32, MVT::Other},
{Chain, In});
Chain = Res.getValue(1);
} else {
+ In = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, In);
+ In = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, MVT::v4i32,
+ DAG.getUNDEF(MVT::v4f32), In,
+ DAG.getVectorIdxConstant(0, DL));
+ In = DAG.getBitcast(MVT::v8i16, In);
Res = DAG.getNode(X86ISD::CVTPH2PS, DL, MVT::v4f32, In,
DAG.getTargetConstant(4, DL, MVT::i32));
}
diff --git a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
index 90975e912d88593..556b0deaf4c8306 100644
--- a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
+++ b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
@@ -43,15 +43,15 @@ define void @v_test_canonicalize__half(half addrspace(1)* %out) nounwind {
;
; AVX512-LABEL: v_test_canonicalize__half:
; AVX512: # %bb.0: # %entry
-; AVX512-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
-; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
-; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
+; AVX512-NEXT: movzwl (%rdi), %eax
+; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ecx
+; AVX512-NEXT: vmovd %ecx, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX512-NEXT: vmovd %eax, %xmm1
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512-NEXT: vmulss %xmm0, %xmm1, %xmm0
+; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpextrw $0, %xmm0, (%rdi)
; AVX512-NEXT: retq
@@ -144,12 +144,12 @@ define half @complex_canonicalize_fmul_half(half %a, half %b) nounwind {
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
-; AVX512-NEXT: vpxor %xmm3, %xmm3, %xmm3
-; AVX512-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3,4,5,6,7]
+; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm2
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT: vmulss %xmm2, %xmm0, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
+; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vsubss %xmm1, %xmm0, %xmm0
@@ -228,21 +228,21 @@ define void @v_test_canonicalize_v2half(<2 x half> addrspace(1)* %out) nounwind
; AVX512-LABEL: v_test_canonicalize_v2half:
; AVX512: # %bb.0: # %entry
; AVX512-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
-; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
-; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
+; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vpshufb {{.*#+}} xmm3 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
-; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
-; AVX512-NEXT: vmulss %xmm1, %xmm3, %xmm3
-; AVX512-NEXT: vpblendd {{.*#+}} xmm3 = xmm3[0],xmm2[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm3
+; AVX512-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vmulss %xmm1, %xmm2, %xmm2
+; AVX512-NEXT: vxorps %xmm3, %xmm3, %xmm3
+; AVX512-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX512-NEXT: vmovd %xmm0, (%rdi)
; AVX512-NEXT: retq
entry:
diff --git a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
index d87a50851031780..989aabc9e87bd38 100644
--- a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
+++ b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
@@ -1930,7 +1930,7 @@ define <4 x half> @test_fmaximum_v4f16(<4 x half> %x, <4 x half> %y) nounwind {
; AVX512-NEXT: cmovpl %eax, %esi
; AVX512-NEXT: vmovd %esi, %xmm3
; AVX512-NEXT: vpinsrw $1, %edx, %xmm3, %xmm3
-; AVX512-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[1,1,1,1]
+; AVX512-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT: vucomiss %xmm4, %xmm5
; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
@@ -1944,7 +1944,7 @@ define <4 x half> @test_fmaximum_v4f16(<4 x half> %x, <4 x half> %y) nounwind {
; AVX512-NEXT: cmovnel %eax, %edx
; AVX512-NEXT: cmovpl %eax, %edx
; AVX512-NEXT: vpinsrw $3, %edx, %xmm3, %xmm3
-; AVX512-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[2,3,2,3]
+; AVX512-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[2,3,0,1]
; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
; AVX512-NEXT: vucomiss %xmm4, %xmm5
; AVX512-NEXT: movl $65535, %edx # imm = 0xFFFF
diff --git a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
index 7610579337811d8..5945bae94f4521d 100644
--- a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
+++ b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
@@ -1813,14 +1813,14 @@ define <4 x half> @test_fmaximumnum_v4f16(<4 x half> %x, <4 x half> %y) nounwind
; AVX512-LABEL: test_fmaximumnum_v4f16:
; AVX512: # %bb.0:
; AVX512-NEXT: subq $72, %rsp
-; AVX512-NEXT: vmovdqa %xmm1, %xmm3
-; AVX512-NEXT: vmovdqa %xmm0, %xmm6
+; AVX512-NEXT: vmovdqa %xmm1, %xmm4
+; AVX512-NEXT: vmovdqa %xmm0, %xmm8
; AVX512-NEXT: vpsrldq {{.*#+}} xmm0 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm1 = xmm6[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm1 = xmm8[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
@@ -1840,64 +1840,67 @@ define <4 x half> @test_fmaximumnum_v4f16(<4 x half> %x, <4 x half> %y) nounwind
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
-; AVX512-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[3,3,3,3]
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vucomiss %xmm2, %xmm2
+; AVX512-NEXT: movzwl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm1
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm9
+; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
+; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[3,3,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpshufd {{.*#+}} xmm4 = xmm6[3,3,3,3]
-; AVX512-NEXT: vcvtph2ps %xmm4, %xmm4
-; AVX512-NEXT: vucomiss %xmm4, %xmm4
+; AVX512-NEXT: vpshufd {{.*#+}} xmm2 = xmm8[3,3,3,3]
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vucomiss %xmm2, %xmm2
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm2, %xmm4, %xmm4 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm4
-; AVX512-NEXT: vmovaps %xmm4, (%rsp) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm4, %xmm5
-; AVX512-NEXT: vmovss %xmm5, %xmm2, %xmm2 {%k1}
+; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k2}
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
-; AVX512-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm4
-; AVX512-NEXT: vucomiss %xmm4, %xmm5
+; AVX512-NEXT: vmovaps %xmm2, (%rsp) # 16-byte Spill
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm3
+; AVX512-NEXT: vucomiss %xmm3, %xmm2
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm5, %xmm4, %xmm4 {%k1}
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm2 = xmm3[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vucomiss %xmm2, %xmm2
+; AVX512-NEXT: vmovss %xmm2, %xmm3, %xmm3 {%k1}
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm1 = xmm4[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpsrldq {{.*#+}} xmm5 = xmm6[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
-; AVX512-NEXT: vucomiss %xmm5, %xmm5
+; AVX512-NEXT: vpsrldq {{.*#+}} xmm2 = xmm8[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vucomiss %xmm2, %xmm2
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm2, %xmm5, %xmm5 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm5
-; AVX512-NEXT: vmovaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm5, %xmm7
-; AVX512-NEXT: vmovss %xmm7, %xmm2, %xmm2 {%k1}
+; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k2}
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm5
-; AVX512-NEXT: vucomiss %xmm5, %xmm7
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512-NEXT: vmovaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512-NEXT: vucomiss %xmm1, %xmm2
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm7, %xmm5, %xmm5 {%k1}
-; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm3[1,0]
+; AVX512-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vshufpd {{.*#+}} xmm2 = xmm4[1,0]
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX512-NEXT: vucomiss %xmm2, %xmm2
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vshufpd {{.*#+}} xmm7 = xmm6[1,0]
+; AVX512-NEXT: vshufpd {{.*#+}} xmm7 = xmm8[1,0]
; AVX512-NEXT: vcvtph2ps %xmm7, %xmm7
; AVX512-NEXT: vucomiss %xmm7, %xmm7
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
; AVX512-NEXT: vmovss %xmm2, %xmm7, %xmm7 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm13
-; AVX512-NEXT: vcvtph2ps %xmm13, %xmm7
+; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm14
+; AVX512-NEXT: vcvtph2ps %xmm14, %xmm7
; AVX512-NEXT: vmovss %xmm7, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vmovaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
@@ -1906,183 +1909,180 @@ define <4 x half> @test_fmaximumnum_v4f16(<4 x half> %x, <4 x half> %y) nounwind
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
; AVX512-NEXT: vmovss %xmm7, %xmm2, %xmm2 {%k1}
-; AVX512-NEXT: vpxor %xmm14, %xmm14, %xmm14
-; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm14[2,3,4,5,6,7]
-; AVX512-NEXT: vcvtph2ps %xmm1, %xmm15
-; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm1
-; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm0
+; AVX512-NEXT: vxorps %xmm15, %xmm15, %xmm15
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm5
+; AVX512-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm4
-; AVX512-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm0
+; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm3
+; AVX512-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm5
-; AVX512-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
+; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm2
; AVX512-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX512-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
-; AVX512-NEXT: vpsrlq $48, %xmm3, %xmm0
+; AVX512-NEXT: vpsrlq $48, %xmm4, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpsrlq $48, %xmm6, %xmm1
+; AVX512-NEXT: vpsrlq $48, %xmm8, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm11
-; AVX512-NEXT: vcvtph2ps %xmm11, %xmm1
+; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm12
+; AVX512-NEXT: vcvtph2ps %xmm12, %xmm1
; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm12
-; AVX512-NEXT: vcvtph2ps %xmm12, %xmm7
-; AVX512-NEXT: vucomiss %xmm7, %xmm1
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm13
+; AVX512-NEXT: vcvtph2ps %xmm13, %xmm6
+; AVX512-NEXT: vucomiss %xmm6, %xmm1
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm1, %xmm7, %xmm7 {%k1}
-; AVX512-NEXT: vmovshdup {{.*#+}} xmm0 = xmm3[1,1,3,3]
+; AVX512-NEXT: vmovss %xmm1, %xmm6, %xmm6 {%k1}
+; AVX512-NEXT: vmovshdup {{.*#+}} xmm0 = xmm4[1,1,3,3]
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm6[1,1,3,3]
+; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm8[1,1,3,3]
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
; AVX512-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm9
-; AVX512-NEXT: vcvtph2ps %xmm9, %xmm4
-; AVX512-NEXT: vmovss %xmm4, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm10
-; AVX512-NEXT: vcvtph2ps %xmm10, %xmm5
-; AVX512-NEXT: vucomiss %xmm5, %xmm4
+; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm10
+; AVX512-NEXT: vcvtph2ps %xmm10, %xmm3
+; AVX512-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm11
+; AVX512-NEXT: vcvtph2ps %xmm11, %xmm5
+; AVX512-NEXT: vucomiss %xmm5, %xmm3
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm4, %xmm5, %xmm5 {%k1}
-; AVX512-NEXT: vcvtph2ps %xmm3, %xmm0
+; AVX512-NEXT: vmovss %xmm3, %xmm5, %xmm5 {%k1}
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm0
; AVX512-NEXT: vucomiss %xmm0, %xmm0
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vcvtph2ps %xmm6, %xmm4
-; AVX512-NEXT: vucomiss %xmm4, %xmm4
+; AVX512-NEXT: vcvtph2ps %xmm8, %xmm3
+; AVX512-NEXT: vucomiss %xmm3, %xmm3
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm0, %xmm4, %xmm4 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm4
-; AVX512-NEXT: vcvtph2ps %xmm4, %xmm1
+; AVX512-NEXT: vmovss %xmm0, %xmm3, %xmm3 {%k2}
+; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm3
+; AVX512-NEXT: vcvtph2ps %xmm3, %xmm1
; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm8
-; AVX512-NEXT: vcvtph2ps %xmm8, %xmm2
+; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm7
+; AVX512-NEXT: vcvtph2ps %xmm7, %xmm2
; AVX512-NEXT: vucomiss %xmm2, %xmm1
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
-; AVX512-NEXT: vpsrld $16, %xmm3, %xmm1
+; AVX512-NEXT: vpsrld $16, %xmm4, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX512-NEXT: vucomiss %xmm1, %xmm1
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vpsrld $16, %xmm6, %xmm3
-; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
-; AVX512-NEXT: vucomiss %xmm3, %xmm3
+; AVX512-NEXT: vpsrld $16, %xmm8, %xmm4
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512-NEXT: vucomiss %xmm4, %xmm4
; AVX512-NEXT: setp %al
; AVX512-NEXT: kmovw %eax, %k2
-; AVX512-NEXT: vmovss %xmm1, %xmm3, %xmm3 {%k2}
-; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm6
-; AVX512-NEXT: vcvtph2ps %xmm6, %xmm3
-; AVX512-NEXT: vmovss %xmm3, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT: vmovss %xmm1, %xmm4, %xmm4 {%k2}
+; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm8
+; AVX512-NEXT: vcvtph2ps %xmm8, %xmm4
+; AVX512-NEXT: vmovss %xmm4, %xmm1, %xmm1 {%k1}
; AVX512-NEXT: vcvtps2ph $4, %xmm1, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm0
-; AVX512-NEXT: vucomiss %xmm0, %xmm3
+; AVX512-NEXT: vucomiss %xmm0, %xmm4
; AVX512-NEXT: seta %al
; AVX512-NEXT: kmovw %eax, %k1
-; AVX512-NEXT: vmovss %xmm3, %xmm0, %xmm0 {%k1}
-; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm3
-; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero
-; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
-; AVX512-NEXT: vmulss %xmm3, %xmm15, %xmm3
+; AVX512-NEXT: vmovss %xmm4, %xmm0, %xmm0 {%k1}
+; AVX512-NEXT: vcvtps2ph $4, %xmm6, %xmm4
+; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512-NEXT: vmulss %xmm4, %xmm9, %xmm4
; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm5
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm5, %xmm5
-; AVX512-NEXT: vmulss %xmm5, %xmm15, %xmm5
+; AVX512-NEXT: vmulss %xmm5, %xmm9, %xmm5
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vmulss %xmm2, %xmm15, %xmm2
+; AVX512-NEXT: vmulss %xmm2, %xmm9, %xmm2
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vmulss %xmm0, %xmm15, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm3 = xmm3[0],xmm14[1,2,3]
-; AVX512-NEXT: vpblendd {{.*#+}} xmm5 = xmm5[0],xmm14[1,2,3]
-; AVX512-NEXT: vpblendd {{.*#+}} xmm7 = xmm2[0],xmm14[1,2,3]
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm14[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm3, %xmm2
-; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm14
-; AVX512-NEXT: vcvtps2ph $4, %xmm7, %xmm3
+; AVX512-NEXT: vmulss %xmm0, %xmm9, %xmm0
+; AVX512-NEXT: vblendps {{.*#+}} xmm4 = xmm4[0],xmm15[1,2,3]
+; AVX512-NEXT: vblendps {{.*#+}} xmm5 = xmm5[0],xmm15[1,2,3]
+; AVX512-NEXT: vblendps {{.*#+}} xmm9 = xmm2[0],xmm15[1,2,3]
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm15[1,2,3]
+; AVX512-NEXT: vcvtps2ph $4, %xmm4, %xmm2
+; AVX512-NEXT: vcvtps2ph $4, %xmm5, %xmm6
+; AVX512-NEXT: vcvtps2ph $4, %xmm9, %xmm4
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm5
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm14[0],xmm2[0],xmm14[1],xmm2[1],xmm14[2],xmm2[2],xmm14[3],xmm2[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm7[0],xmm0[0],xmm7[1],xmm0[1]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm9[0],xmm0[0],xmm9[1],xmm0[1]
; AVX512-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX512-NEXT: # xmm0 = xmm0[0],mem[0]
-; AVX512-NEXT: vmovdqa (%rsp), %xmm7 # 16-byte Reload
-; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm7, %xmm7 # 16-byte Folded Reload
-; AVX512-NEXT: # xmm7 = xmm7[0],mem[0],xmm7[1],mem[1],xmm7[2],mem[2],xmm7[3],mem[3]
-; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm13, %xmm13 # 16-byte Folded Reload
-; AVX512-NEXT: # xmm13 = xmm13[0],mem[0],xmm13[1],mem[1],xmm13[2],mem[2],xmm13[3],mem[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm13[0],xmm7[0],xmm13[1],xmm7[1]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm9[0],xmm11[0],xmm9[1],xmm11[1],xmm9[2],xmm11[2],xmm9[3],xmm11[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm4[0],xmm9[0],xmm4[1],xmm9[1]
-; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm7[0]
-; AVX512-NEXT: vpxor %xmm6, %xmm6, %xmm6
-; AVX512-NEXT: vpcmpeqw %xmm6, %xmm4, %xmm7
-; AVX512-NEXT: vpblendvb %xmm7, %xmm4, %xmm0, %xmm4
-; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
-; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm7, %xmm7 # 16-byte Folded Reload
-; AVX512-NEXT: # xmm7 = xmm7[0],mem[0],xmm7[1],mem[1],xmm7[2],mem[2],xmm7[3],mem[3]
+; AVX512-NEXT: vmovdqa (%rsp), %xmm9 # 16-byte Reload
+; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm9, %xmm9 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm9 = xmm9[0],mem[0],xmm9[1],mem[1],xmm9[2],mem[2],xmm9[3],mem[3]
+; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm14, %xmm14 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm14 = xmm14[0],mem[0],xmm14[1],mem[1],xmm14[2],mem[2],xmm14[3],mem[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm14[0],xmm9[0],xmm14[1],xmm9[1]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm3[0],xmm8[0],xmm3[1],xmm8[1],xmm3[2],xmm8[2],xmm3[3],xmm8[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm10[0],xmm3[1],xmm10[1]
+; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm9[0]
+; AVX512-NEXT: vpxor %xmm8, %xmm8, %xmm8
+; AVX512-NEXT: vpcmpeqw %xmm3, %xmm8, %xmm9
+; AVX512-NEXT: vpblendvb %xmm9, %xmm3, %xmm0, %xmm3
; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Reload
; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm9, %xmm9 # 16-byte Folded Reload
; AVX512-NEXT: # xmm9 = xmm9[0],mem[0],xmm9[1],mem[1],xmm9[2],mem[2],xmm9[3],mem[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm9[0],xmm7[0],xmm9[1],xmm7[1]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3]
-; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm8[0],xmm1[0],xmm8[1],xmm1[1],xmm8[2],xmm1[2],xmm8[3],xmm1[3]
-; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm9[0],xmm1[1],xmm9[1]
-; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm7[0]
-; AVX512-NEXT: vpcmpeqw %xmm6, %xmm1, %xmm6
-; AVX512-NEXT: vpblendvb %xmm6, %xmm1, %xmm4, %xmm1
-; AVX512-NEXT: vcvtph2ps %xmm5, %xmm4
+; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Reload
+; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm10, %xmm10 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm10 = xmm10[0],mem[0],xmm10[1],mem[1],xmm10[2],mem[2],xmm10[3],mem[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm9 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm11[0],xmm13[0],xmm11[1],xmm13[1],xmm11[2],xmm13[2],xmm11[3],xmm13[3]
+; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm7[0],xmm1[0],xmm7[1],xmm1[1],xmm7[2],xmm1[2],xmm7[3],xmm1[3]
+; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm10[0],xmm1[1],xmm10[1]
+; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm9[0]
+; AVX512-NEXT: vpcmpeqw %xmm1, %xmm8, %xmm7
+; AVX512-NEXT: vpblendvb %xmm7, %xmm1, %xmm3, %xmm1
+; AVX512-NEXT: vcvtph2ps %xmm5, %xmm3
; AVX512-NEXT: xorl %eax, %eax
; AVX512-NEXT: vpxor %xmm5, %xmm5, %xmm5
-; AVX512-NEXT: vucomiss %xmm5, %xmm4
+; AVX512-NEXT: vucomiss %xmm5, %xmm3
; AVX512-NEXT: movl $65535, %ecx # imm = 0xFFFF
; AVX512-NEXT: movl $0, %edx
; AVX512-NEXT: cmovel %ecx, %edx
-; AVX512-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512-NEXT: vcvtph2ps %xmm4, %xmm3
; AVX512-NEXT: vucomiss %xmm5, %xmm3
; AVX512-NEXT: movl $0, %esi
; AVX512-NEXT: cmovel %ecx, %esi
-; AVX512-NEXT: vcvtph2ps %xmm14, %xmm3
+; AVX512-NEXT: vcvtph2ps %xmm6, %xmm3
; AVX512-NEXT: vucomiss %xmm5, %xmm3
; AVX512-NEXT: movl $0, %edi
; AVX512-NEXT: cmovel %ecx, %edi
diff --git a/llvm/test/CodeGen/X86/fp-round.ll b/llvm/test/CodeGen/X86/fp-round.ll
index f7d68190f852c95..e98fb8e374c0b35 100644
--- a/llvm/test/CodeGen/X86/fp-round.ll
+++ b/llvm/test/CodeGen/X86/fp-round.ll
@@ -50,8 +50,6 @@ define half @round_f16(half %h) {
;
; AVX512F-LABEL: round_f16:
; AVX512F: # %bb.0: # %entry
-; AVX512F-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX512F-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512F-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4.9999997E-1,4.9999997E-1,4.9999997E-1,4.9999997E-1]
; AVX512F-NEXT: vpternlogd {{.*#+}} xmm1 = xmm1 | (xmm0 & mem)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
index 6dda71b0bef9ca6..6a6b86e8efa7c33 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
@@ -32,12 +32,15 @@ define i32 @test_f16_oeq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oeq_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
@@ -93,12 +96,15 @@ define i32 @test_f16_ogt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ogt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
; AVX-NEXT: retq
;
@@ -151,12 +157,15 @@ define i32 @test_f16_oge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oge_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
; AVX-NEXT: retq
;
@@ -211,10 +220,13 @@ define i32 @test_f16_olt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_olt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
@@ -271,10 +283,13 @@ define i32 @test_f16_ole_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ole_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
@@ -329,12 +344,15 @@ define i32 @test_f16_one_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_one_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovel %esi, %eax
; AVX-NEXT: retq
;
@@ -387,12 +405,15 @@ define i32 @test_f16_ord_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ord_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
;
@@ -445,12 +466,15 @@ define i32 @test_f16_ueq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ueq_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: retq
;
@@ -505,10 +529,13 @@ define i32 @test_f16_ugt_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ugt_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
@@ -565,10 +592,13 @@ define i32 @test_f16_uge_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uge_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
@@ -623,12 +653,15 @@ define i32 @test_f16_ult_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ult_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
; AVX-NEXT: retq
;
@@ -681,12 +714,15 @@ define i32 @test_f16_ule_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ule_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
; AVX-NEXT: retq
;
@@ -740,12 +776,15 @@ define i32 @test_f16_une_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_une_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovnel %edi, %eax
; AVX-NEXT: cmovpl %edi, %eax
; AVX-NEXT: retq
@@ -801,12 +840,15 @@ define i32 @test_f16_uno_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uno_q:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: cmovnpl %esi, %eax
; AVX-NEXT: retq
;
@@ -860,12 +902,15 @@ define i32 @test_f16_oeq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oeq_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
@@ -921,12 +966,15 @@ define i32 @test_f16_ogt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ogt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
; AVX-NEXT: retq
;
@@ -979,12 +1027,15 @@ define i32 @test_f16_oge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_oge_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
; AVX-NEXT: retq
;
@@ -1039,10 +1090,13 @@ define i32 @test_f16_olt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_olt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbel %esi, %eax
@@ -1099,10 +1153,13 @@ define i32 @test_f16_ole_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ole_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovbl %esi, %eax
@@ -1157,12 +1214,15 @@ define i32 @test_f16_one_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_one_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovel %esi, %eax
; AVX-NEXT: retq
;
@@ -1215,12 +1275,15 @@ define i32 @test_f16_ord_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ord_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovpl %esi, %eax
; AVX-NEXT: retq
;
@@ -1273,12 +1336,15 @@ define i32 @test_f16_ueq_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ueq_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovnel %esi, %eax
; AVX-NEXT: retq
;
@@ -1333,10 +1399,13 @@ define i32 @test_f16_ugt_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ugt_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
@@ -1393,10 +1462,13 @@ define i32 @test_f16_uge_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uge_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: vpextrw $0, %xmm0, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
@@ -1451,12 +1523,15 @@ define i32 @test_f16_ult_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ult_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovael %esi, %eax
; AVX-NEXT: retq
;
@@ -1509,12 +1584,15 @@ define i32 @test_f16_ule_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_ule_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmoval %esi, %eax
; AVX-NEXT: retq
;
@@ -1568,12 +1646,15 @@ define i32 @test_f16_une_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_une_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %esi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovnel %edi, %eax
; AVX-NEXT: cmovpl %edi, %eax
; AVX-NEXT: retq
@@ -1629,12 +1710,15 @@ define i32 @test_f16_uno_s(i32 %a, i32 %b, half %f1, half %f2) #0 {
; AVX-LABEL: test_f16_uno_s:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX-NEXT: vpextrw $0, %xmm1, %edx
+; AVX-NEXT: movzwl %dx, %edx
+; AVX-NEXT: vmovd %edx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vcomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vcomiss %xmm0, %xmm1
; AVX-NEXT: cmovnpl %esi, %eax
; AVX-NEXT: retq
;
@@ -1683,12 +1767,15 @@ define void @foo(half %0, half %1) #0 {
;
; AVX-LABEL: foo:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vucomiss %xmm1, %xmm0
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vucomiss %xmm0, %xmm1
; AVX-NEXT: ja bar at PLT # TAILCALL
; AVX-NEXT: # %bb.1:
; AVX-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
index c0022a2846f4a43..fbc798d8bbe48c8 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
@@ -34,13 +34,17 @@ define half @fadd_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fadd_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -78,13 +82,17 @@ define half @fsub_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fsub_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vsubss %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vsubss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -122,13 +130,17 @@ define half @fmul_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fmul_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -166,13 +178,17 @@ define half @fdiv_f16(half %a, half %b) nounwind strictfp {
;
; AVX-LABEL: fdiv_f16:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
-; AVX-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
-; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: vpextrw $0, %xmm1, %ecx
+; AVX-NEXT: movzwl %cx, %ecx
+; AVX-NEXT: vmovd %ecx, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm1
+; AVX-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
;
@@ -205,9 +221,8 @@ define void @fpext_f16_to_f32(ptr %val, ptr %ret) nounwind strictfp {
;
; AVX-LABEL: fpext_f16_to_f32:
; AVX: # %bb.0:
-; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; AVX-NEXT: movzwl (%rdi), %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vmovss %xmm0, (%rsi)
; AVX-NEXT: retq
@@ -248,9 +263,8 @@ define void @fpext_f16_to_f64(ptr %val, ptr %ret) nounwind strictfp {
;
; AVX-LABEL: fpext_f16_to_f64:
; AVX: # %bb.0:
-; AVX-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; AVX-NEXT: movzwl (%rdi), %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovsd %xmm0, (%rsi)
@@ -379,29 +393,17 @@ define void @fsqrt_f16(ptr %a) nounwind strictfp {
; SSE2-NEXT: popq %rbx
; SSE2-NEXT: retq
;
-; F16C-LABEL: fsqrt_f16:
-; F16C: # %bb.0:
-; F16C-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
-; F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
-; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
-; F16C-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
-; F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
-; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; F16C-NEXT: vpextrw $0, %xmm0, (%rdi)
-; F16C-NEXT: retq
-;
-; AVX512-LABEL: fsqrt_f16:
-; AVX512: # %bb.0:
-; AVX512-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
-; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX512-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
-; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
-; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; AVX512-NEXT: vpextrw $0, %xmm0, (%rdi)
-; AVX512-NEXT: retq
+; AVX-LABEL: fsqrt_f16:
+; AVX: # %bb.0:
+; AVX-NEXT: movzwl (%rdi), %eax
+; AVX-NEXT: vmovd %eax, %xmm0
+; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX-NEXT: vpextrw $0, %xmm0, (%rdi)
+; AVX-NEXT: retq
;
; X86-LABEL: fsqrt_f16:
; X86: # %bb.0:
@@ -453,30 +455,42 @@ define half @fma_f16(half %a, half %b, half %c) nounwind strictfp {
; F16C-LABEL: fma_f16:
; F16C: # %bb.0:
; F16C-NEXT: pushq %rax
-; F16C-NEXT: vxorps %xmm3, %xmm3, %xmm3
-; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
+; F16C-NEXT: vpextrw $0, %xmm0, %eax
+; F16C-NEXT: vpextrw $0, %xmm1, %ecx
+; F16C-NEXT: vpextrw $0, %xmm2, %edx
+; F16C-NEXT: movzwl %dx, %edx
+; F16C-NEXT: vmovd %edx, %xmm0
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm2
+; F16C-NEXT: movzwl %cx, %ecx
+; F16C-NEXT: vmovd %ecx, %xmm0
+; F16C-NEXT: vcvtph2ps %xmm0, %xmm1
+; F16C-NEXT: movzwl %ax, %eax
+; F16C-NEXT: vmovd %eax, %xmm0
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
-; F16C-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3]
-; F16C-NEXT: vcvtph2ps %xmm1, %xmm1
-; F16C-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
-; F16C-NEXT: vcvtph2ps %xmm2, %xmm2
; F16C-NEXT: callq fmaf at PLT
-; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],mem[1,2,3]
+; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; F16C-NEXT: popq %rax
; F16C-NEXT: retq
;
; AVX512-LABEL: fma_f16:
; AVX512: # %bb.0:
-; AVX512-NEXT: vxorps %xmm3, %xmm3, %xmm3
-; AVX512-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
-; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
+; AVX512-NEXT: vpextrw $0, %xmm1, %eax
+; AVX512-NEXT: vpextrw $0, %xmm0, %ecx
+; AVX512-NEXT: vpextrw $0, %xmm2, %edx
+; AVX512-NEXT: movzwl %dx, %edx
+; AVX512-NEXT: vmovd %edx, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512-NEXT: vblendps {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3]
+; AVX512-NEXT: movzwl %cx, %ecx
+; AVX512-NEXT: vmovd %ecx, %xmm1
; AVX512-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm1 = (xmm0 * xmm1) + xmm2
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm3[1,2,3]
+; AVX512-NEXT: movzwl %ax, %eax
+; AVX512-NEXT: vmovd %eax, %xmm2
+; AVX512-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm1 * xmm2) + xmm0
+; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0
+; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
index 85b43e28e7b14eb..0498f9b7f9a3d0e 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
@@ -28,8 +28,9 @@ define i1 @fptosi_f16toi1(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi1:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -63,8 +64,9 @@ define i8 @fptosi_f16toi8(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi8:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -98,8 +100,9 @@ define i16 @fptosi_f16toi16(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi16:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax
@@ -132,8 +135,9 @@ define i32 @fptosi_f16toi32(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi32:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: retq
@@ -163,8 +167,9 @@ define i64 @fptosi_f16toi64(half %x) #0 {
;
; AVX-LABEL: fptosi_f16toi64:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %rax
; AVX-NEXT: retq
@@ -198,8 +203,9 @@ define i1 @fptoui_f16toi1(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi1:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -233,8 +239,9 @@ define i8 @fptoui_f16toi8(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi8:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $al killed $al killed $eax
@@ -268,8 +275,9 @@ define i16 @fptoui_f16toi16(half %x) #0 {
;
; AVX-LABEL: fptoui_f16toi16:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vcvttss2si %xmm0, %eax
; AVX-NEXT: # kill: def $ax killed $ax killed $eax
@@ -303,8 +311,9 @@ define i32 @fptoui_f16toi32(half %x) #0 {
;
; F16C-LABEL: fptoui_f16toi32:
; F16C: # %bb.0:
-; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; F16C-NEXT: vpextrw $0, %xmm0, %eax
+; F16C-NEXT: movzwl %ax, %eax
+; F16C-NEXT: vmovd %eax, %xmm0
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; F16C-NEXT: vcvttss2si %xmm0, %rax
; F16C-NEXT: # kill: def $eax killed $eax killed $rax
@@ -312,8 +321,9 @@ define i32 @fptoui_f16toi32(half %x) #0 {
;
; AVX512-LABEL: fptoui_f16toi32:
; AVX512: # %bb.0:
-; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX512-NEXT: vpextrw $0, %xmm0, %eax
+; AVX512-NEXT: movzwl %ax, %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vcvttss2usi %xmm0, %eax
; AVX512-NEXT: retq
@@ -355,8 +365,9 @@ define i64 @fptoui_f16toi64(half %x) #0 {
;
; F16C-LABEL: fptoui_f16toi64:
; F16C: # %bb.0:
-; F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; F16C-NEXT: vpextrw $0, %xmm0, %eax
+; F16C-NEXT: movzwl %ax, %eax
+; F16C-NEXT: vmovd %eax, %xmm0
; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; F16C-NEXT: vmovss {{.*#+}} xmm1 = [9.22337203E+18,0.0E+0,0.0E+0,0.0E+0]
; F16C-NEXT: vcomiss %xmm1, %xmm0
@@ -375,8 +386,9 @@ define i64 @fptoui_f16toi64(half %x) #0 {
;
; AVX512-LABEL: fptoui_f16toi64:
; AVX512: # %bb.0:
-; AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX512-NEXT: vpextrw $0, %xmm0, %eax
+; AVX512-NEXT: movzwl %ax, %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vcvttss2usi %xmm0, %rax
; AVX512-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
index 6d3907261b60a08..1ab97dafb851475 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
@@ -25,10 +25,12 @@ define half @fceil32(half %f) #0 {
;
; AVX-LABEL: fceil32:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -59,10 +61,12 @@ define half @ffloor32(half %f) #0 {
;
; AVX-LABEL: ffloor32:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -93,10 +97,12 @@ define half @ftrunc32(half %f) #0 {
;
; AVX-LABEL: ftrunc32:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -127,10 +133,12 @@ define half @frint32(half %f) #0 {
;
; AVX-LABEL: frint32:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -162,10 +170,12 @@ define half @fnearbyint32(half %f) #0 {
;
; AVX-LABEL: fnearbyint32:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -197,10 +207,12 @@ define half @froundeven16(half %f) #0 {
;
; AVX-LABEL: froundeven16:
; AVX: # %bb.0:
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: vroundss $8, %xmm0, %xmm0, %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -233,11 +245,13 @@ define half @fround16(half %f) #0 {
; AVX-LABEL: fround16:
; AVX: # %bb.0:
; AVX-NEXT: pushq %rax
-; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; AVX-NEXT: vpextrw $0, %xmm0, %eax
+; AVX-NEXT: movzwl %ax, %eax
+; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX-NEXT: callq roundf at PLT
-; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],mem[1,2,3]
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX-NEXT: popq %rax
; AVX-NEXT: retq
diff --git a/llvm/test/CodeGen/X86/half-constrained.ll b/llvm/test/CodeGen/X86/half-constrained.ll
index 8840d23716e8800..0f73129d984bd91 100644
--- a/llvm/test/CodeGen/X86/half-constrained.ll
+++ b/llvm/test/CodeGen/X86/half-constrained.ll
@@ -24,9 +24,8 @@ define float @half_to_float() strictfp {
; X86-F16C: # %bb.0:
; X86-F16C-NEXT: pushl %eax
; X86-F16C-NEXT: .cfi_def_cfa_offset 8
-; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
-; X86-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X86-F16C-NEXT: movzwl a, %eax
+; X86-F16C-NEXT: vmovd %eax, %xmm0
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X86-F16C-NEXT: vmovss %xmm0, (%esp)
; X86-F16C-NEXT: flds (%esp)
@@ -49,9 +48,8 @@ define float @half_to_float() strictfp {
; X64-F16C-LABEL: half_to_float:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
-; X64-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X64-F16C-NEXT: movzwl (%rax), %eax
+; X64-F16C-NEXT: vmovd %eax, %xmm0
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: retq
%1 = load half, ptr @a, align 2
@@ -75,9 +73,8 @@ define double @half_to_double() strictfp {
; X86-F16C: # %bb.0:
; X86-F16C-NEXT: subl $12, %esp
; X86-F16C-NEXT: .cfi_def_cfa_offset 16
-; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
-; X86-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X86-F16C-NEXT: movzwl a, %eax
+; X86-F16C-NEXT: vmovd %eax, %xmm0
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X86-F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; X86-F16C-NEXT: vmovsd %xmm0, (%esp)
@@ -102,9 +99,8 @@ define double @half_to_double() strictfp {
; X64-F16C-LABEL: half_to_double:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
-; X64-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X64-F16C-NEXT: movzwl (%rax), %eax
+; X64-F16C-NEXT: vmovd %eax, %xmm0
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; X64-F16C-NEXT: retq
@@ -346,15 +342,15 @@ define void @add() strictfp {
;
; X86-F16C-LABEL: add:
; X86-F16C: # %bb.0:
-; X86-F16C-NEXT: vpinsrw $0, a, %xmm0, %xmm0
-; X86-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X86-F16C-NEXT: movzwl a, %eax
+; X86-F16C-NEXT: vmovd %eax, %xmm0
; X86-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
-; X86-F16C-NEXT: vpinsrw $0, b, %xmm0, %xmm2
-; X86-F16C-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3,4,5,6,7]
-; X86-F16C-NEXT: vcvtph2ps %xmm2, %xmm2
-; X86-F16C-NEXT: vaddss %xmm2, %xmm0, %xmm0
-; X86-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X86-F16C-NEXT: movzwl b, %eax
+; X86-F16C-NEXT: vmovd %eax, %xmm1
+; X86-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
+; X86-F16C-NEXT: vaddss %xmm1, %xmm0, %xmm0
+; X86-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; X86-F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; X86-F16C-NEXT: vpextrw $0, %xmm0, c
; X86-F16C-NEXT: retl
@@ -382,16 +378,16 @@ define void @add() strictfp {
; X64-F16C-LABEL: add:
; X64-F16C: # %bb.0:
; X64-F16C-NEXT: movq a at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm0
-; X64-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X64-F16C-NEXT: movzwl (%rax), %eax
+; X64-F16C-NEXT: vmovd %eax, %xmm0
; X64-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; X64-F16C-NEXT: movq b at GOTPCREL(%rip), %rax
-; X64-F16C-NEXT: vpinsrw $0, (%rax), %xmm0, %xmm2
-; X64-F16C-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3,4,5,6,7]
-; X64-F16C-NEXT: vcvtph2ps %xmm2, %xmm2
-; X64-F16C-NEXT: vaddss %xmm2, %xmm0, %xmm0
-; X64-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; X64-F16C-NEXT: movzwl (%rax), %eax
+; X64-F16C-NEXT: vmovd %eax, %xmm1
+; X64-F16C-NEXT: vcvtph2ps %xmm1, %xmm1
+; X64-F16C-NEXT: vaddss %xmm1, %xmm0, %xmm0
+; X64-F16C-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X64-F16C-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; X64-F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; X64-F16C-NEXT: movq c at GOTPCREL(%rip), %rax
; X64-F16C-NEXT: vpextrw $0, %xmm0, (%rax)
diff --git a/llvm/test/CodeGen/X86/half-darwin.ll b/llvm/test/CodeGen/X86/half-darwin.ll
index 478fa4f0ed7def4..3cbf5c11235ea83 100644
--- a/llvm/test/CodeGen/X86/half-darwin.ll
+++ b/llvm/test/CodeGen/X86/half-darwin.ll
@@ -165,9 +165,8 @@ define float @strict_extendhfsf(ptr %ptr) nounwind strictfp {
;
; CHECK-F16C-LABEL: strict_extendhfsf:
; CHECK-F16C: ## %bb.0:
-; CHECK-F16C-NEXT: vpinsrw $0, (%rdi), %xmm0, %xmm0
-; CHECK-F16C-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; CHECK-F16C-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
+; CHECK-F16C-NEXT: movzwl (%rdi), %eax
+; CHECK-F16C-NEXT: vmovd %eax, %xmm0
; CHECK-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
; CHECK-F16C-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/pr91005.ll b/llvm/test/CodeGen/X86/pr91005.ll
index d73cd7482c39047..4ef6285d86e8d32 100644
--- a/llvm/test/CodeGen/X86/pr91005.ll
+++ b/llvm/test/CodeGen/X86/pr91005.ll
@@ -8,7 +8,8 @@ define void @PR91005(ptr %0) minsize {
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je .LBB0_2
; CHECK-NEXT: # %bb.1:
-; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [31744,31744,31744,31744]
+; CHECK-NEXT: movl $31744, %eax # imm = 0x7C00
+; CHECK-NEXT: vmovd %eax, %xmm0
; CHECK-NEXT: vpcmpeqw %xmm0, %xmm0, %xmm0
; CHECK-NEXT: vpinsrw $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0
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