[llvm] [RISCV] Improve Errors for X1/X5/X1X5 Reg Classes (PR #126184)

[Sam Elliott via llvm-commits]

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@@ -247,7 +247,11 @@ def GPR : GPRRegisterClass<(add (sequence "X%u", 10, 17),
                                 (sequence "X%u", 0, 4))>;
 
 def GPRX0 : GPRRegisterClass<(add X0)>;
+
+let DiagnosticType = "InvalidRegClassGPRX1" in
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lenary wrote:

In response to the first comment:

I was thinking of adding a `let DiagnosticType= "InvalidRegClass" # NAME;` in `RISCVRegisterClass`, but didn't want to change a lot of error messages at the same time. I hadn't worked out your suggestion, but I think that only works for `GPRRegisterClass`, and I want to do all `RISCVRegisterClass`es.

I do want to get to the point where RISCVRegisterClass has `let DiagnosticType= "InvalidRegClass" # NAME;` but that's a long way off. I'm also not sure what to do with things like `GPRAll` which shouldn't ever be used in the AsmParser.

As for the two points in the second comment:

- DiagnosticString needs more hooking up in C++, but I agree we might want to head that direction. It generates a `getMatchKindDiag` function which returns the string, which then needs a bit more processing to get the location and emit it (the Arm backend is the only one to use this mechanism upstream).

- I don't think we'll get good error messages if we auto-generate strings from the included regList, I think it's better to explain them as groups, rather than just listing (up to) 32 registers that are allowed there. These three are small and there's no specific semantic group like there is with e.g. GPRNoX0.

I'll look at moving some of the existing diagnostics into a DiagnosticString, to see how that goes (as we also have the same thing on `AsmOperandClass`). I think that can go in parallel to this, maybe?

https://github.com/llvm/llvm-project/pull/126184