[llvm] b40ef2c - [RISCV][Disassemble] Ensure the comment stream of the disassembler is set. (#125962)

via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 6 14:11:49 PST 2025


Author: Francesco Petrogalli
Date: 2025-02-06T14:11:45-08:00
New Revision: b40ef2ce46480a501e530cf7ee0d434b2b8f910f

URL: https://github.com/llvm/llvm-project/commit/b40ef2ce46480a501e530cf7ee0d434b2b8f910f
DIFF: https://github.com/llvm/llvm-project/commit/b40ef2ce46480a501e530cf7ee0d434b2b8f910f.diff

LOG: [RISCV][Disassemble] Ensure the comment stream of the disassembler is set. (#125962)

Added: 
    

Modified: 
    llvm/lib/MC/MCDisassembler/MCDisassembler.cpp
    llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/MC/MCDisassembler/MCDisassembler.cpp b/llvm/lib/MC/MCDisassembler/MCDisassembler.cpp
index 6aa4b0e4fcb99da..0dfa17eb1346fdb 100644
--- a/llvm/lib/MC/MCDisassembler/MCDisassembler.cpp
+++ b/llvm/lib/MC/MCDisassembler/MCDisassembler.cpp
@@ -29,17 +29,21 @@ bool MCDisassembler::tryAddingSymbolicOperand(MCInst &Inst, int64_t Value,
                                               uint64_t Address, bool IsBranch,
                                               uint64_t Offset, uint64_t OpSize,
                                               uint64_t InstSize) const {
-  if (Symbolizer)
+  if (Symbolizer) {
+    assert(CommentStream && "CommentStream is not set.");
     return Symbolizer->tryAddingSymbolicOperand(Inst, *CommentStream, Value,
                                                 Address, IsBranch, Offset,
                                                 OpSize, InstSize);
+  }
   return false;
 }
 
 void MCDisassembler::tryAddingPcLoadReferenceComment(int64_t Value,
                                                      uint64_t Address) const {
-  if (Symbolizer)
+  if (Symbolizer) {
+    assert(CommentStream && "CommentStream is not set.");
     Symbolizer->tryAddingPcLoadReferenceComment(*CommentStream, Value, Address);
+  }
 }
 
 void MCDisassembler::setSymbolizer(std::unique_ptr<MCSymbolizer> Symzer) {

diff  --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 3ec465810b1d114..01648ec0cbe9ea9 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -789,6 +789,7 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
                                                ArrayRef<uint8_t> Bytes,
                                                uint64_t Address,
                                                raw_ostream &CS) const {
+  CommentStream = &CS;
   // It's a 16 bit instruction if bit 0 and 1 are not 0b11.
   if ((Bytes[0] & 0b11) != 0b11)
     return getInstruction16(MI, Size, Bytes, Address, CS);


        


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