[llvm] Reduce shl64 to shl32 if shift range is [63-32] (PR #125574)

[via llvm-commits]

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@@ -0,0 +1,67 @@
+;; Test reduction of:
+;;
+;;   DST = shl i64 X, Y
+;;
+;; where Y is in the range [63-32] to:
+;;
+;;   DST = [0, shl i32 X, (Y - 32)]
+
+; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck %s
+
+; FIXME: This case should be reduced, but SelectionDAG::computeKnownBits() cannot
+;        determine the minimum from metadata in this case.  Match current results
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LU-JOHN wrote:

Will investigate in a separate PR.

https://github.com/llvm/llvm-project/pull/125574