[llvm] bddc815 - Revert "[RISCV] Prefer (select (x < 0), y, z) -> x >> (XLEN - 1) & (y - z) + z even with Zicond. (#125772)"

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-02-06T09:22:14-08:00
New Revision: bddc815c616aff64d70d494982f348ea365d4b3e

URL: https://github.com/llvm/llvm-project/commit/bddc815c616aff64d70d494982f348ea365d4b3e
DIFF: https://github.com/llvm/llvm-project/commit/bddc815c616aff64d70d494982f348ea365d4b3e.diff

LOG: Revert "[RISCV] Prefer (select (x < 0), y, z)  -> x >> (XLEN - 1) & (y - z) + z even with Zicond. (#125772)"

This reverts commit ead88c787c4eba28b2148a5aaf190186bdb40820.

I seem to have lost the test updates when rebasing.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index d91ba33c235966..165c71d8e03f16 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -8460,33 +8460,6 @@ SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
     if (isa<ConstantSDNode>(TrueV) && isa<ConstantSDNode>(FalseV)) {
       const APInt &TrueVal = TrueV->getAsAPIntVal();
       const APInt &FalseVal = FalseV->getAsAPIntVal();
-
-      // Prefer these over Zicond to avoid materializing an immediate:
-      //   (select (x < 0), y, z)  -> x >> (XLEN - 1) & (y - z) + z
-      //   (select (x > -1), z, y) -> x >> (XLEN - 1) & (y - z) + z
-      if (CondV.getOpcode() == ISD::SETCC &&
-          CondV.getOperand(0).getValueType() == VT && CondV.hasOneUse()) {
-        ISD::CondCode CCVal = cast<CondCodeSDNode>(CondV.getOperand(2))->get();
-        if ((CCVal == ISD::SETLT && isNullConstant(CondV.getOperand(1))) ||
-            (CCVal == ISD::SETGT && isAllOnesConstant(CondV.getOperand(1)))) {
-          int64_t TrueImm = TrueVal.getSExtValue();
-          int64_t FalseImm = FalseVal.getSExtValue();
-          if (CCVal == ISD::SETGT)
-            std::swap(TrueImm, FalseImm);
-          if (isInt<12>(TrueImm) && isInt<12>(FalseImm) &&
-              isInt<12>(TrueImm - FalseImm)) {
-            SDValue SRA =
-                DAG.getNode(ISD::SRA, DL, VT, CondV.getOperand(0),
-                            DAG.getConstant(Subtarget.getXLen() - 1, DL, VT));
-            SDValue AND =
-                DAG.getNode(ISD::AND, DL, VT, SRA,
-                            DAG.getSignedConstant(TrueImm - FalseImm, DL, VT));
-            return DAG.getNode(ISD::ADD, DL, VT, AND,
-                               DAG.getSignedConstant(FalseImm, DL, VT));
-          }
-        }
-      }
-
       const int TrueValCost = RISCVMatInt::getIntMatCost(
           TrueVal, Subtarget.getXLen(), Subtarget, /*CompressionCost=*/true);
       const int FalseValCost = RISCVMatInt::getIntMatCost(