[llvm] [CodeGen] Avoid repeated hash lookups (NFC) (PR #126002)

Kazu Hirata via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 5 20:58:53 PST 2025


https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/126002

None

>From 7dc09cc8fd398ecbfd686543d01bf6683a91dcbe Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Wed, 5 Feb 2025 09:18:46 -0800
Subject: [PATCH] [CodeGen] Avoid repeated hash lookups (NFC)

---
 llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
index 4fddc2033b81b7c..1c465741cb46231 100644
--- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -810,9 +810,10 @@ class MachineRegisterInfo {
   void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) {
     assert(VReg.isVirtual());
     RegAllocHints.grow(Register::index2VirtReg(getNumVirtRegs()));
-    RegAllocHints[VReg].first  = Type;
-    RegAllocHints[VReg].second.clear();
-    RegAllocHints[VReg].second.push_back(PrefReg);
+    auto &Hint = RegAllocHints[VReg];
+    Hint.first = Type;
+    Hint.second.clear();
+    Hint.second.push_back(PrefReg);
   }
 
   /// addRegAllocationHint - Add a register allocation hint to the hints
@@ -843,9 +844,9 @@ class MachineRegisterInfo {
     assert(VReg.isVirtual());
     if (!RegAllocHints.inBounds(VReg))
       return {0, Register()};
-    Register BestHint = (RegAllocHints[VReg.id()].second.size() ?
-                         RegAllocHints[VReg.id()].second[0] : Register());
-    return {RegAllocHints[VReg.id()].first, BestHint};
+    auto &Hint = RegAllocHints[VReg.id()];
+    Register BestHint = (Hint.second.size() ? Hint.second[0] : Register());
+    return {Hint.first, BestHint};
   }
 
   /// getSimpleHint - same as getRegAllocationHint except it will only return



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