[llvm] [AMDGPU] Allow rematerialization of instructions with virtual register uses (PR #124327)

[Jeffrey Byrnes via llvm-commits]

jrbyrnes wrote:

Okay -- I had to fix the expensive check because of the condition that not every subreg will have a subrange.

Because of this, we may run into a situation where the LiveInMask != the register mask, however we aren't adding any live regs. Slightly modified the lit test to trigger this condition.

If there isn't any objection, I will land.

https://github.com/llvm/llvm-project/pull/124327