[llvm] [RISCV][NFC] Remove nounwind from push/pop tests (PR #125939)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 5 14:48:05 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Sam Elliott (lenary)
<details>
<summary>Changes</summary>
These tests are for frame handling code with push/pop. To increase coverage of CFI/Unwind info, this removes the `nounwind` annotations and regenerates the checks for this test.
---
Patch is 59.36 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/125939.diff
1 Files Affected:
- (modified) llvm/test/CodeGen/RISCV/push-pop-popret.ll (+808-8)
``````````diff
diff --git a/llvm/test/CodeGen/RISCV/push-pop-popret.ll b/llvm/test/CodeGen/RISCV/push-pop-popret.ll
index 865d55a4dcb95af..5a3b67adfaab11d 100644
--- a/llvm/test/CodeGen/RISCV/push-pop-popret.ll
+++ b/llvm/test/CodeGen/RISCV/push-pop-popret.ll
@@ -104,7 +104,7 @@ define i32 @foo() {
ret i32 0
}
-define i32 @pushpopret0(i32 signext %size){
+define i32 @pushpopret0(i32 signext %size) {
; RV32IZCMP-LABEL: pushpopret0:
; RV32IZCMP: # %bb.0: # %entry
; RV32IZCMP-NEXT: cm.push {ra, s0}, -16
@@ -1151,10 +1151,11 @@ entry:
declare void @llvm.va_start(ptr)
declare void @llvm.va_end(ptr)
-define i32 @varargs(ptr %fmt, ...) nounwind {
+define i32 @varargs(ptr %fmt, ...) {
; RV32IZCMP-LABEL: varargs:
; RV32IZCMP: # %bb.0:
; RV32IZCMP-NEXT: addi sp, sp, -48
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 48
; RV32IZCMP-NEXT: mv a0, a1
; RV32IZCMP-NEXT: sw a5, 36(sp)
; RV32IZCMP-NEXT: sw a6, 40(sp)
@@ -1166,11 +1167,13 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
; RV32IZCMP-NEXT: addi a1, sp, 24
; RV32IZCMP-NEXT: sw a1, 12(sp)
; RV32IZCMP-NEXT: addi sp, sp, 48
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 0
; RV32IZCMP-NEXT: ret
;
; RV64IZCMP-LABEL: varargs:
; RV64IZCMP: # %bb.0:
; RV64IZCMP-NEXT: addi sp, sp, -80
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 80
; RV64IZCMP-NEXT: sd a1, 24(sp)
; RV64IZCMP-NEXT: addi a0, sp, 28
; RV64IZCMP-NEXT: sd a0, 8(sp)
@@ -1182,11 +1185,13 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
; RV64IZCMP-NEXT: sd a3, 40(sp)
; RV64IZCMP-NEXT: sd a4, 48(sp)
; RV64IZCMP-NEXT: addi sp, sp, 80
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 0
; RV64IZCMP-NEXT: ret
;
; RV32IZCMP-SR-LABEL: varargs:
; RV32IZCMP-SR: # %bb.0:
; RV32IZCMP-SR-NEXT: addi sp, sp, -48
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 48
; RV32IZCMP-SR-NEXT: mv a0, a1
; RV32IZCMP-SR-NEXT: sw a5, 36(sp)
; RV32IZCMP-SR-NEXT: sw a6, 40(sp)
@@ -1198,11 +1203,13 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
; RV32IZCMP-SR-NEXT: addi a1, sp, 24
; RV32IZCMP-SR-NEXT: sw a1, 12(sp)
; RV32IZCMP-SR-NEXT: addi sp, sp, 48
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 0
; RV32IZCMP-SR-NEXT: ret
;
; RV64IZCMP-SR-LABEL: varargs:
; RV64IZCMP-SR: # %bb.0:
; RV64IZCMP-SR-NEXT: addi sp, sp, -80
+; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 80
; RV64IZCMP-SR-NEXT: sd a1, 24(sp)
; RV64IZCMP-SR-NEXT: addi a0, sp, 28
; RV64IZCMP-SR-NEXT: sd a0, 8(sp)
@@ -1214,11 +1221,13 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
; RV64IZCMP-SR-NEXT: sd a3, 40(sp)
; RV64IZCMP-SR-NEXT: sd a4, 48(sp)
; RV64IZCMP-SR-NEXT: addi sp, sp, 80
+; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 0
; RV64IZCMP-SR-NEXT: ret
;
; RV32I-LABEL: varargs:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -48
+; RV32I-NEXT: .cfi_def_cfa_offset 48
; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: sw a5, 36(sp)
; RV32I-NEXT: sw a6, 40(sp)
@@ -1230,11 +1239,13 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
; RV32I-NEXT: addi a1, sp, 24
; RV32I-NEXT: sw a1, 12(sp)
; RV32I-NEXT: addi sp, sp, 48
+; RV32I-NEXT: .cfi_def_cfa_offset 0
; RV32I-NEXT: ret
;
; RV64I-LABEL: varargs:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -80
+; RV64I-NEXT: .cfi_def_cfa_offset 80
; RV64I-NEXT: sd a1, 24(sp)
; RV64I-NEXT: addi a0, sp, 28
; RV64I-NEXT: sd a0, 8(sp)
@@ -1246,6 +1257,7 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
; RV64I-NEXT: sd a3, 40(sp)
; RV64I-NEXT: sd a4, 48(sp)
; RV64I-NEXT: addi sp, sp, 80
+; RV64I-NEXT: .cfi_def_cfa_offset 0
; RV64I-NEXT: ret
%va = alloca ptr
call void @llvm.va_start(ptr %va)
@@ -1259,10 +1271,16 @@ define i32 @varargs(ptr %fmt, ...) nounwind {
@var0 = global [18 x i32] zeroinitializer
-define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
+define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) {
; RV32IZCMP-LABEL: many_args:
; RV32IZCMP: # %bb.0: # %entry
; RV32IZCMP-NEXT: cm.push {ra, s0-s4}, -32
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 32
+; RV32IZCMP-NEXT: .cfi_offset s0, -20
+; RV32IZCMP-NEXT: .cfi_offset s1, -16
+; RV32IZCMP-NEXT: .cfi_offset s2, -12
+; RV32IZCMP-NEXT: .cfi_offset s3, -8
+; RV32IZCMP-NEXT: .cfi_offset s4, -4
; RV32IZCMP-NEXT: lui a0, %hi(var0)
; RV32IZCMP-NEXT: lw a6, %lo(var0)(a0)
; RV32IZCMP-NEXT: lw a7, %lo(var0+4)(a0)
@@ -1306,6 +1324,12 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
; RV64IZCMP-LABEL: many_args:
; RV64IZCMP: # %bb.0: # %entry
; RV64IZCMP-NEXT: cm.push {ra, s0-s4}, -48
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 48
+; RV64IZCMP-NEXT: .cfi_offset s0, -40
+; RV64IZCMP-NEXT: .cfi_offset s1, -32
+; RV64IZCMP-NEXT: .cfi_offset s2, -24
+; RV64IZCMP-NEXT: .cfi_offset s3, -16
+; RV64IZCMP-NEXT: .cfi_offset s4, -8
; RV64IZCMP-NEXT: lui a0, %hi(var0)
; RV64IZCMP-NEXT: lw a6, %lo(var0)(a0)
; RV64IZCMP-NEXT: lw a7, %lo(var0+4)(a0)
@@ -1349,6 +1373,12 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
; RV32IZCMP-SR-LABEL: many_args:
; RV32IZCMP-SR: # %bb.0: # %entry
; RV32IZCMP-SR-NEXT: cm.push {ra, s0-s4}, -32
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 32
+; RV32IZCMP-SR-NEXT: .cfi_offset s0, -20
+; RV32IZCMP-SR-NEXT: .cfi_offset s1, -16
+; RV32IZCMP-SR-NEXT: .cfi_offset s2, -12
+; RV32IZCMP-SR-NEXT: .cfi_offset s3, -8
+; RV32IZCMP-SR-NEXT: .cfi_offset s4, -4
; RV32IZCMP-SR-NEXT: lui a0, %hi(var0)
; RV32IZCMP-SR-NEXT: lw a6, %lo(var0)(a0)
; RV32IZCMP-SR-NEXT: lw a7, %lo(var0+4)(a0)
@@ -1392,6 +1422,12 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
; RV64IZCMP-SR-LABEL: many_args:
; RV64IZCMP-SR: # %bb.0: # %entry
; RV64IZCMP-SR-NEXT: cm.push {ra, s0-s4}, -48
+; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 48
+; RV64IZCMP-SR-NEXT: .cfi_offset s0, -40
+; RV64IZCMP-SR-NEXT: .cfi_offset s1, -32
+; RV64IZCMP-SR-NEXT: .cfi_offset s2, -24
+; RV64IZCMP-SR-NEXT: .cfi_offset s3, -16
+; RV64IZCMP-SR-NEXT: .cfi_offset s4, -8
; RV64IZCMP-SR-NEXT: lui a0, %hi(var0)
; RV64IZCMP-SR-NEXT: lw a6, %lo(var0)(a0)
; RV64IZCMP-SR-NEXT: lw a7, %lo(var0+4)(a0)
@@ -1435,11 +1471,17 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
; RV32I-LABEL: many_args:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: .cfi_def_cfa_offset 32
; RV32I-NEXT: sw s0, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s1, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s2, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s3, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s4, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: .cfi_offset s0, -4
+; RV32I-NEXT: .cfi_offset s1, -8
+; RV32I-NEXT: .cfi_offset s2, -12
+; RV32I-NEXT: .cfi_offset s3, -16
+; RV32I-NEXT: .cfi_offset s4, -20
; RV32I-NEXT: lui a0, %hi(var0)
; RV32I-NEXT: lw a1, %lo(var0)(a0)
; RV32I-NEXT: lw a2, %lo(var0+4)(a0)
@@ -1483,17 +1525,29 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
; RV32I-NEXT: lw s2, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: .cfi_restore s0
+; RV32I-NEXT: .cfi_restore s1
+; RV32I-NEXT: .cfi_restore s2
+; RV32I-NEXT: .cfi_restore s3
+; RV32I-NEXT: .cfi_restore s4
; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: .cfi_def_cfa_offset 0
; RV32I-NEXT: ret
;
; RV64I-LABEL: many_args:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: .cfi_def_cfa_offset 48
; RV64I-NEXT: sd s0, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s3, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s4, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: .cfi_offset s0, -8
+; RV64I-NEXT: .cfi_offset s1, -16
+; RV64I-NEXT: .cfi_offset s2, -24
+; RV64I-NEXT: .cfi_offset s3, -32
+; RV64I-NEXT: .cfi_offset s4, -40
; RV64I-NEXT: lui a0, %hi(var0)
; RV64I-NEXT: lw a1, %lo(var0)(a0)
; RV64I-NEXT: lw a2, %lo(var0+4)(a0)
@@ -1537,7 +1591,13 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
; RV64I-NEXT: ld s2, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: .cfi_restore s0
+; RV64I-NEXT: .cfi_restore s1
+; RV64I-NEXT: .cfi_restore s2
+; RV64I-NEXT: .cfi_restore s3
+; RV64I-NEXT: .cfi_restore s4
; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: .cfi_def_cfa_offset 0
; RV64I-NEXT: ret
entry:
%val = load [18 x i32], ptr @var0
@@ -1551,11 +1611,16 @@ declare ptr @llvm.stacksave()
declare void @llvm.stackrestore(ptr)
declare void @notdead(ptr)
-define void @alloca(i32 %n) nounwind {
+define void @alloca(i32 %n) {
; RV32IZCMP-LABEL: alloca:
; RV32IZCMP: # %bb.0:
; RV32IZCMP-NEXT: cm.push {ra, s0-s1}, -16
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 16
+; RV32IZCMP-NEXT: .cfi_offset ra, -12
+; RV32IZCMP-NEXT: .cfi_offset s0, -8
+; RV32IZCMP-NEXT: .cfi_offset s1, -4
; RV32IZCMP-NEXT: addi s0, sp, 16
+; RV32IZCMP-NEXT: .cfi_def_cfa s0, 0
; RV32IZCMP-NEXT: mv s1, sp
; RV32IZCMP-NEXT: addi a0, a0, 15
; RV32IZCMP-NEXT: andi a0, a0, -16
@@ -1564,12 +1629,18 @@ define void @alloca(i32 %n) nounwind {
; RV32IZCMP-NEXT: call notdead
; RV32IZCMP-NEXT: mv sp, s1
; RV32IZCMP-NEXT: addi sp, s0, -16
+; RV32IZCMP-NEXT: .cfi_def_cfa sp, 16
; RV32IZCMP-NEXT: cm.popret {ra, s0-s1}, 16
;
; RV64IZCMP-LABEL: alloca:
; RV64IZCMP: # %bb.0:
; RV64IZCMP-NEXT: cm.push {ra, s0-s1}, -32
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 32
+; RV64IZCMP-NEXT: .cfi_offset ra, -24
+; RV64IZCMP-NEXT: .cfi_offset s0, -16
+; RV64IZCMP-NEXT: .cfi_offset s1, -8
; RV64IZCMP-NEXT: addi s0, sp, 32
+; RV64IZCMP-NEXT: .cfi_def_cfa s0, 0
; RV64IZCMP-NEXT: mv s1, sp
; RV64IZCMP-NEXT: slli a0, a0, 32
; RV64IZCMP-NEXT: srli a0, a0, 32
@@ -1580,12 +1651,18 @@ define void @alloca(i32 %n) nounwind {
; RV64IZCMP-NEXT: call notdead
; RV64IZCMP-NEXT: mv sp, s1
; RV64IZCMP-NEXT: addi sp, s0, -32
+; RV64IZCMP-NEXT: .cfi_def_cfa sp, 32
; RV64IZCMP-NEXT: cm.popret {ra, s0-s1}, 32
;
; RV32IZCMP-SR-LABEL: alloca:
; RV32IZCMP-SR: # %bb.0:
; RV32IZCMP-SR-NEXT: cm.push {ra, s0-s1}, -16
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
+; RV32IZCMP-SR-NEXT: .cfi_offset ra, -12
+; RV32IZCMP-SR-NEXT: .cfi_offset s0, -8
+; RV32IZCMP-SR-NEXT: .cfi_offset s1, -4
; RV32IZCMP-SR-NEXT: addi s0, sp, 16
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
; RV32IZCMP-SR-NEXT: mv s1, sp
; RV32IZCMP-SR-NEXT: addi a0, a0, 15
; RV32IZCMP-SR-NEXT: andi a0, a0, -16
@@ -1594,12 +1671,18 @@ define void @alloca(i32 %n) nounwind {
; RV32IZCMP-SR-NEXT: call notdead
; RV32IZCMP-SR-NEXT: mv sp, s1
; RV32IZCMP-SR-NEXT: addi sp, s0, -16
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa sp, 16
; RV32IZCMP-SR-NEXT: cm.popret {ra, s0-s1}, 16
;
; RV64IZCMP-SR-LABEL: alloca:
; RV64IZCMP-SR: # %bb.0:
; RV64IZCMP-SR-NEXT: cm.push {ra, s0-s1}, -32
+; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 32
+; RV64IZCMP-SR-NEXT: .cfi_offset ra, -24
+; RV64IZCMP-SR-NEXT: .cfi_offset s0, -16
+; RV64IZCMP-SR-NEXT: .cfi_offset s1, -8
; RV64IZCMP-SR-NEXT: addi s0, sp, 32
+; RV64IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
; RV64IZCMP-SR-NEXT: mv s1, sp
; RV64IZCMP-SR-NEXT: slli a0, a0, 32
; RV64IZCMP-SR-NEXT: srli a0, a0, 32
@@ -1610,15 +1693,21 @@ define void @alloca(i32 %n) nounwind {
; RV64IZCMP-SR-NEXT: call notdead
; RV64IZCMP-SR-NEXT: mv sp, s1
; RV64IZCMP-SR-NEXT: addi sp, s0, -32
+; RV64IZCMP-SR-NEXT: .cfi_def_cfa sp, 32
; RV64IZCMP-SR-NEXT: cm.popret {ra, s0-s1}, 32
;
; RV32I-LABEL: alloca:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: .cfi_def_cfa_offset 16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: .cfi_offset ra, -4
+; RV32I-NEXT: .cfi_offset s0, -8
+; RV32I-NEXT: .cfi_offset s1, -12
; RV32I-NEXT: addi s0, sp, 16
+; RV32I-NEXT: .cfi_def_cfa s0, 0
; RV32I-NEXT: mv s1, sp
; RV32I-NEXT: addi a0, a0, 15
; RV32I-NEXT: andi a0, a0, -16
@@ -1627,19 +1716,29 @@ define void @alloca(i32 %n) nounwind {
; RV32I-NEXT: call notdead
; RV32I-NEXT: mv sp, s1
; RV32I-NEXT: addi sp, s0, -16
+; RV32I-NEXT: .cfi_def_cfa sp, 16
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: .cfi_restore ra
+; RV32I-NEXT: .cfi_restore s0
+; RV32I-NEXT: .cfi_restore s1
; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: .cfi_def_cfa_offset 0
; RV32I-NEXT: ret
;
; RV64I-LABEL: alloca:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: .cfi_offset ra, -8
+; RV64I-NEXT: .cfi_offset s0, -16
+; RV64I-NEXT: .cfi_offset s1, -24
; RV64I-NEXT: addi s0, sp, 32
+; RV64I-NEXT: .cfi_def_cfa s0, 0
; RV64I-NEXT: mv s1, sp
; RV64I-NEXT: slli a0, a0, 32
; RV64I-NEXT: srli a0, a0, 32
@@ -1650,10 +1749,15 @@ define void @alloca(i32 %n) nounwind {
; RV64I-NEXT: call notdead
; RV64I-NEXT: mv sp, s1
; RV64I-NEXT: addi sp, s0, -32
+; RV64I-NEXT: .cfi_def_cfa sp, 32
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: .cfi_restore ra
+; RV64I-NEXT: .cfi_restore s0
+; RV64I-NEXT: .cfi_restore s1
; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: .cfi_def_cfa_offset 0
; RV64I-NEXT: ret
%sp = call ptr @llvm.stacksave()
%addr = alloca i8, i32 %n
@@ -1665,11 +1769,14 @@ define void @alloca(i32 %n) nounwind {
declare i32 @foo_test_irq(...)
@var_test_irq = global [32 x i32] zeroinitializer
-define void @foo_with_irq() nounwind "interrupt"="user" {
+define void @foo_with_irq() "interrupt"="user" {
; RV32IZCMP-LABEL: foo_with_irq:
; RV32IZCMP: # %bb.0:
; RV32IZCMP-NEXT: cm.push {ra}, -64
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 64
+; RV32IZCMP-NEXT: .cfi_offset ra, -4
; RV32IZCMP-NEXT: addi sp, sp, -16
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 80
; RV32IZCMP-NEXT: sw t0, 60(sp) # 4-byte Folded Spill
; RV32IZCMP-NEXT: sw t1, 56(sp) # 4-byte Folded Spill
; RV32IZCMP-NEXT: sw t2, 52(sp) # 4-byte Folded Spill
@@ -1685,6 +1792,21 @@ define void @foo_with_irq() nounwind "interrupt"="user" {
; RV32IZCMP-NEXT: sw t4, 12(sp) # 4-byte Folded Spill
; RV32IZCMP-NEXT: sw t5, 8(sp) # 4-byte Folded Spill
; RV32IZCMP-NEXT: sw t6, 4(sp) # 4-byte Folded Spill
+; RV32IZCMP-NEXT: .cfi_offset t0, -20
+; RV32IZCMP-NEXT: .cfi_offset t1, -24
+; RV32IZCMP-NEXT: .cfi_offset t2, -28
+; RV32IZCMP-NEXT: .cfi_offset a0, -32
+; RV32IZCMP-NEXT: .cfi_offset a1, -36
+; RV32IZCMP-NEXT: .cfi_offset a2, -40
+; RV32IZCMP-NEXT: .cfi_offset a3, -44
+; RV32IZCMP-NEXT: .cfi_offset a4, -48
+; RV32IZCMP-NEXT: .cfi_offset a5, -52
+; RV32IZCMP-NEXT: .cfi_offset a6, -56
+; RV32IZCMP-NEXT: .cfi_offset a7, -60
+; RV32IZCMP-NEXT: .cfi_offset t3, -64
+; RV32IZCMP-NEXT: .cfi_offset t4, -68
+; RV32IZCMP-NEXT: .cfi_offset t5, -72
+; RV32IZCMP-NEXT: .cfi_offset t6, -76
; RV32IZCMP-NEXT: call foo_test_irq
; RV32IZCMP-NEXT: lw t0, 60(sp) # 4-byte Folded Reload
; RV32IZCMP-NEXT: lw t1, 56(sp) # 4-byte Folded Reload
@@ -1701,14 +1823,35 @@ define void @foo_with_irq() nounwind "interrupt"="user" {
; RV32IZCMP-NEXT: lw t4, 12(sp) # 4-byte Folded Reload
; RV32IZCMP-NEXT: lw t5, 8(sp) # 4-byte Folded Reload
; RV32IZCMP-NEXT: lw t6, 4(sp) # 4-byte Folded Reload
+; RV32IZCMP-NEXT: .cfi_restore t0
+; RV32IZCMP-NEXT: .cfi_restore t1
+; RV32IZCMP-NEXT: .cfi_restore t2
+; RV32IZCMP-NEXT: .cfi_restore a0
+; RV32IZCMP-NEXT: .cfi_restore a1
+; RV32IZCMP-NEXT: .cfi_restore a2
+; RV32IZCMP-NEXT: .cfi_restore a3
+; RV32IZCMP-NEXT: .cfi_restore a4
+; RV32IZCMP-NEXT: .cfi_restore a5
+; RV32IZCMP-NEXT: .cfi_restore a6
+; RV32IZCMP-NEXT: .cfi_restore a7
+; RV32IZCMP-NEXT: .cfi_restore t3
+; RV32IZCMP-NEXT: .cfi_restore t4
+; RV32IZCMP-NEXT: .cfi_restore t5
+; RV32IZCMP-NEXT: .cfi_restore t6
; RV32IZCMP-NEXT: addi sp, sp, 16
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 64
; RV32IZCMP-NEXT: cm.pop {ra}, 64
+; RV32IZCMP-NEXT: .cfi_restore ra
+; RV32IZCMP-NEXT: .cfi_def_cfa_offset 0
; RV32IZCMP-NEXT: mret
;
; RV64IZCMP-LABEL: foo_with_irq:
; RV64IZCMP: # %bb.0:
; RV64IZCMP-NEXT: cm.push {ra}, -64
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 64
+; RV64IZCMP-NEXT: .cfi_offset ra, -8
; RV64IZCMP-NEXT: addi sp, sp, -80
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 144
; RV64IZCMP-NEXT: sd t0, 120(sp) # 8-byte Folded Spill
; RV64IZCMP-NEXT: sd t1, 112(sp) # 8-byte Folded Spill
; RV64IZCMP-NEXT: sd t2, 104(sp) # 8-byte Folded Spill
@@ -1724,6 +1867,21 @@ define void @foo_with_irq() nounwind "interrupt"="user" {
; RV64IZCMP-NEXT: sd t4, 24(sp) # 8-byte Folded Spill
; RV64IZCMP-NEXT: sd t5, 16(sp) # 8-byte Folded Spill
; RV64IZCMP-NEXT: sd t6, 8(sp) # 8-byte Folded Spill
+; RV64IZCMP-NEXT: .cfi_offset t0, -24
+; RV64IZCMP-NEXT: .cfi_offset t1, -32
+; RV64IZCMP-NEXT: .cfi_offset t2, -40
+; RV64IZCMP-NEXT: .cfi_offset a0, -48
+; RV64IZCMP-NEXT: .cfi_offset a1, -56
+; RV64IZCMP-NEXT: .cfi_offset a2, -64
+; RV64IZCMP-NEXT: .cfi_offset a3, -72
+; RV64IZCMP-NEXT: .cfi_offset a4, -80
+; RV64IZCMP-NEXT: .cfi_offset a5, -88
+; RV64IZCMP-NEXT: .cfi_offset a6, -96
+; RV64IZCMP-NEXT: .cfi_offset a7, -104
+; RV64IZCMP-NEXT: .cfi_offset t3, -112
+; RV64IZCMP-NEXT: .cfi_offset t4, -120
+; RV64IZCMP-NEXT: .cfi_offset t5, -128
+; RV64IZCMP-NEXT: .cfi_offset t6, -136
; RV64IZCMP-NEXT: call foo_test_irq
; RV64IZCMP-NEXT: ld t0, 120(sp) # 8-byte Folded Reload
; RV64IZCMP-NEXT: ld t1, 112(sp) # 8-byte Folded Reload
@@ -1740,14 +1898,35 @@ define void @foo_with_irq() nounwind "interrupt"="user" {
; RV64IZCMP-NEXT: ld t4, 24(sp) # 8-byte Folded Reload
; RV64IZCMP-NEXT: ld t5, 16(sp) # 8-byte Folded Reload
; RV64IZCMP-NEXT: ld t6, 8(sp) # 8-byte Folded Reload
+; RV64IZCMP-NEXT: .cfi_restore t0
+; RV64IZCMP-NEXT: .cfi_restore t1
+; RV64IZCMP-NEXT: .cfi_restore t2
+; RV64IZCMP-NEXT: .cfi_restore a0
+; RV64IZCMP-NEXT: .cfi_restore a1
+; RV64IZCMP-NEXT: .cfi_restore a2
+; RV64IZCMP-NEXT: .cfi_restore a3
+; RV64IZCMP-NEXT: .cfi_restore a4
+; RV64IZCMP-NEXT: .cfi_restore a5
+; RV64IZCMP-NEXT: .cfi_restore a6
+; RV64IZCMP-NEXT: .cfi_restore a7
+; RV64IZCMP-NEXT: .cfi_restore t3
+; RV64IZCMP-NEXT: .cfi_restore t4
+; RV64IZCMP-NEXT: .cfi_restore t5
+; RV64IZCMP-NEXT: .cfi_restore t6
; RV64IZCMP-NEXT: addi sp, sp, 80
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 64
; RV64IZCMP-NEXT: cm.pop {ra}, 64
+; RV64IZCMP-NEXT: .cfi_restore ra
+; RV64IZCMP-NEXT: .cfi_def_cfa_offset 0
; RV64IZCMP-NEXT: mret
;
; RV32IZCMP-SR-LABEL: foo_with_irq:
; RV32IZCMP-SR: # %bb.0:
; RV32IZCMP-SR-NEXT: cm.push {ra}, -64
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 64
+; RV32IZCMP-SR-NEXT: .cfi_offset ra, -4
; RV32IZCMP-SR-NEXT: addi sp, sp, -16
+; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 80
; RV32IZCMP-SR-NEXT: sw t0, 60(sp) # 4-byte Folded Spill
; RV32IZCMP-SR-NEXT: sw t1, 56(sp) # 4-byte Folded Spill
; RV32IZCMP-SR-NEXT: sw t2, 52(sp) # 4-byte Folded Spill
@@ -1763,6 +1942,21 @@ define void @foo_with_irq() nounwind "interrupt"="user" {
; RV32IZCMP-SR-NEXT: sw t4, 12(sp) # 4-byt...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/125939
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